IP Library Granted Patent US 8,124,542
Granted Patent B2
US 8,124,542 · App. 12/205,950 · Granted Feb 28, 2012

Method of fabricating semiconductor device

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Quick Facts
Patent No.
US 8,124,542
App. No.
12/205,950
Granted
Feb 28, 2012
Kind
B2
Abstract

The present invention includes the steps of: forming an device isolation region in a substrate to divide the device isolation region into a first and a second diffusion regions; forming a target film to be processed on the substrate; forming a hard mask layer and a first resist layer on the film to be processed; forming a first pattern on the first resist layer; etching the hard mask layer by using the first pattern as a mask; forming a second resist layer on the hard mask layer; forming a second pattern including a first space on the second resist layer for isolating the first pattern; forming a third pattern including a second space shrunk from the first space on the hard mask layer by carrying out size conversion etching by using the second pattern formed on the second resist layer as a mask; and etching the film to be processed by using the third pattern formed on the hard mask layer.

Claims (38)

1. A method of fabricating a semiconductor device comprising the steps of:

forming an device isolation region in a substrate to divide a diffusion region into a first and a second diffusion regions;

forming a film to be processed on the substrate;

forming a hard mask layer and a first resist layer on the film to be processed;

forming a first pattern on the first resist layer;

etching the hard mask layer by using the first pattern as a mask;

forming a second resist layer on the hard mask layer;

forming a second pattern including a first space on the second resist layer for isolating the first pattern;

forming a third pattern including a second space shrunk from the first space on the hard mask layer by carrying out size conversion etching by using the second pattern formed on the second resist layer as a mask; and

etching the film to be processed by using the third pattern formed on the hard mask layer,

wherein the third pattern is a gate electrode pattern.

2. The method of fabricating a semiconductor device according to claim 1 , wherein the second space is formed in an device isolation region between the first and second diffusion regions.

3. The method of fabricating a semiconductor device according to claim 1 , wherein an anti-reflective coating film is formed on the hard mask layer.

4. The method of fabricating a semiconductor device according to claim 1 , wherein the hard mask layer comprises a material selected from the group consisting of SiOC, SiO2, SiON, SiN, SiC, SiOF and SiCN.

5. The method of fabricating a semiconductor device according to claim 1 , wherein etching gas used in the etching the hard mask layer is fluorocarbon gas expressed by CxHyFz (x=1 to 5, y=0 to 3, z=1 to 8) or its mixture.

6. The method of fabricating a semiconductor device according to claim 5 , wherein the fluorocarbon gas is selected from the group consisting of CHF3 and CH2F2.

7. The method of fabricating a semiconductor device according to claim 5 , wherein the etching gas further includes a gas selected from the group consisting of He, Ar, O2, N2 and CF4.

8. A method of fabricating a semiconductor device, comprising:

forming a device isolation region in a substrate;

forming a film to be processed on the substrate;

forming a hard mask layer on the film to be processed;

forming a first pattern in the hard mask layer;

forming a resist layer on the first pattern;

forming a second pattern including a first space in the resist layer, the first space being overlapped with the device isolation region;

etching the hard mask layer to form a third pattern including a second space shrunk from the first space by using the second pattern formed in the resist layer as a mask; and

etching the film to be processed by using the hard mask layer including the first pattern and the third pattern.

9. The method of fabricating a semiconductor device according to claim 8 , wherein the film to be processed is a conductive film.

10. The method of fabricating a semiconductor device according to claim 8 , wherein a space between each the first pattern is larger than the second space.

11. The method of fabricating a semiconductor device according to claim 8 , wherein the third pattern is a gate electrode pattern.

12. A method of fabricating a semiconductor device, comprising:

forming a device isolation region in a substrate;

forming a film to be processed on the substrate;

forming a hard mask layer on the film to be processed;

forming a first pattern in the hard mask layer;

forming a resist layer on the first pattern;

forming a second pattern including a first space in the resist layer;

etching the hard mask layer to form a third pattern including a second space shrunk from the first space by using the second pattern formed in the resist layer as a mask; and

etching the film to be processed by using the hard mask layer including the first pattern and the third pattern.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0304 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2008
From: TANIGUCHI, KENSUKE
To: NEC ELECTRONICS CORPORATION
Reel/Frame 021492/0753 →