IP Library Granted Patent US 7,812,454
Granted Patent B2
US 7,812,454 · App. 12/208,630 · Granted Oct 12, 2010

Semiconductor structure and method of manufacture

Assignee: HVVi Semiconductors, Inc
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Quick Facts
Patent No.
US 7,812,454
App. No.
12/208,630
Granted
Oct 12, 2010
Kind
B2
Abstract

In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, an electrical bus embedded in a dielectric material below a surface of a semiconductor substrate is disclosed. Other embodiments are described and claimed.

Claims (20)

1. A semiconductor structure, comprising:

an electrical bus embedded in a dielectric material disposed at least partially below a surface of a semiconductor substrate;

an active region disposed external to the dielectric material;

an electrical interconnect at least partially disposed external to the dielectric material to electrically couple the active region with the electrical bus embedded in the dielectric material; and

a stress relief trench disposed in the semiconductor substrate at least partially disposed between the active region and the dielectric material.

2. The structure of claim 1 , wherein the electrical bus extends at least two microns below the surface of the semiconductor substrate.

3. The structure of claim 1 , wherein the electrical bus has a width of at least one micron.

4. The structure of claim 1 , wherein the electrical bus comprises two electrical conductors spaced at least two microns apart.

5. The structure of claim 1 , wherein the dielectric material surrounding the electrical bus has a width of at least one micron.

6. The structure of claim 1 , wherein the dielectric material surrounding the electrical bus extends at least 0.5 micron below the bottom of the electrical bus.

7. The structure of claim 1 , further comprising:

a second electrical interconnect;

a circuit element coupled to the electrical bus through the second electrical interconnect above the surface of the semiconductor substrate, the circuit element comprising at least one or more passive devices.

8. The structure of claim 1 , further comprising one or more active circuit elements, wherein the dielectric material surrounds or partially surrounds the one or more active circuit elements.

9. The structure of claim 1 , wherein a portion of the electrical bus is separated from the dielectric material by a gap.

10. The structure of claim 9 , wherein a pressure in the gap is below atmospheric pressure.

11. The structure of claim 10 , wherein the gap has a width of at least about 0.1 micron.

12. The structure of claim 1 , wherein the electrical bus comprises a first electrical conductor and a second electrical conductor, the second electrical conductor formed over the first electrical conductor and separated from the first electrical conductor by a second dielectric material.

13. The structure of claim 1 , wherein the dielectric material comprises silicon dioxide.

14. The structure of claim 1 , wherein the electrical bus comprises aluminum.

Assignments (4)
MERGER Recorded Dec 30, 2015
From: ESTIVATION PROPERTIES LLC
To: XENOGENIC DEVELOPMENT LIMITED LIABILITY COMPANY
Reel/Frame 037384/0135 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2013
From: HVVI SEMICONDUCTOR, INC.
To: ESTIVATION PROPERTIES LLC
Reel/Frame 030408/0580 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2008
From: GOGOI, BISHNU PRASANNA
To: HVVI SEMICONDUCTORS, INC.
Reel/Frame 021703/0080 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2008
From: GOGOI, BISHNU PRASANNA
To: HVVI SEMICONDUCTORS, INC.
Reel/Frame 021703/0098 →
Continuity (2)
Provisional Application 6098306400 · Oct 26, 2007
Related Publication 20090108458A1 · Apr 30, 2009