Semiconductor device

1 . A semiconductor device comprising:

a voltage controlling target block which outputs error detection signals according to a plurality of respective voltages supplied from a power supplier; and

a power controller which outputs one of the plurality of voltages to the power supplier, wherein the power controller determines a voltage controlling target block voltage to be supplied to the voltage controlling target block based on the error detection signal.

2 . The semiconductor device according to claim 1 , further comprising:

an error detector which determines, based on the error detection signal, whether an operation of the voltage controlling target block is normal, wherein

the power supplier outputs one of the plurality of voltages in response to a control signal supplied from the power controller,

the voltage controlling target block outputs the error detection signal to the error detector in response to a voltage supplied from the power supplier,

the error detector informs the power controller of a determination result as to whether the operation of the voltage controlling target block is normal, and

the power controller applies a voltage indicated by the control signal as the voltage controlling target block voltage to be applied to the voltage controlling target block, when the operation of the voltage controlling target block is normal.

3 . The semiconductor device according to claim 2 , wherein

the power controller outputs a new control signal to cause the power supplier to output a new one of the plurality of voltages, when the operation of the voltage controlling target block is not normal.

4 . The semiconductor device according to claim 2 , includes a normal operation mode and a standby mode, wherein

the voltage controlling target block outputs the error detection signals according to the plurality of voltages supplied in the normal operation mode; and

the power controller determines, based on a voltage indicated by the control signal and on the determination result from the error detector, a voltage controlling target block voltage to be supplied to the voltage controlling target block in the standby mode.

5 . The semiconductor device according to claim 4 , wherein

the voltage controlling target block outputs, as the error detection signal, one of signals respectively indicating different values in accordance with the plurality of voltages.

6 . The semiconductor device according to claim 5 ., wherein

the error detector includes an expected value, and outputs the determination result showing that the operation of the voltage controlling target block is normal, when the error detection signal agrees with the expected value, and

if the determination result shows that the operation of the voltage controlling target block is normal, the power controller applies, as the voltage controlling target block voltage, a voltage indicated by the control signal.

7 . The semiconductor device according to claim 4 , wherein

the voltage controlling target block represents a counter which counts a standby time in the standby mode.

8 . The semiconductor device according to claim 7 , wherein

the voltage controlling target block supplies a count value, corresponding to one of the plurality of voltages, to the error detector, and

the error detector determines whether the count value corresponds with the expected value.

9 . The semiconductor device according to claim 8 , further comprising:

a detection timing generator which supplies a first timing and a second timing to the error detector, wherein

the error detector sets, as the expected value, a count value at the time when the voltage controlling target block operates normally for a period of time from the first timing to the second timing,

the error detector sets the count value supplied from the voltage controlling target block at the first timing, as a first count value,

the error detector sets the count value supplied from the voltage controlling target block at the second timing, as a second count value, and

the error detector determines whether an operation of the voltage controlling target block is normal, based on a comparison between the expected value and a difference between the first count value and the second count value.

10 . The semiconductor device according to claim 4 , wherein

the error detector includes in the normal operation mode:

a monitoring period when an operation of the voltage controlling target block is monitored; and

a non-monitoring period when the monitoring of an operation of the voltage controlling target block is stopped.

11 . A power supplying method of a semiconductor device, comprising:

(a) instructing a power supplier to output one of a plurality of voltages;

(b) outputting an error detection signal in accordance with each of a plurality of voltages supplied from the power supplier; and

(c) determining, based on the error detection signal, a voltage controlling target block voltage supplied from the voltage controlling target block.

12 . The power supplying method of the semiconductor device according to claim 11 , wherein

the step (a) includes:

outputting a control signal to cause the power supplier to output one of the plurality of voltages, and

the step (c) includes:

determining, based on the error detection signal, whether an operation of the voltage controlling target block is normal,

informing the power controller of a determination result, and

determining the voltage controlling target block voltage based on a voltage indicated by the control signal, and on the determination result.

13 . The power supplying method of the semiconductor device according to claim 12 , wherein

the voltage controlling target block has a normal operation mode and a standby mode,

the step (b) includes:

outputting the error detection signals in accordance with the plurality of voltages supplied in the normal operation mode, and

the step (c) includes:

determining a voltage controlling target block voltage to be supplied to the voltage controlling target block in the standby mode, the voltage controlling target block voltage based on a voltage indicated by the control signal and on the determination result from the error detector.

14 . The power supplying method of the semiconductor device according to claim 13 , wherein

the step (b) includes:

outputting, as the error detection signal, one of signals respectively indicating different values in accordance with the plurality of voltages.

15 . The power supplying method of the semiconductor device according to claim 14 , wherein

the step (c) includes:

reading an expected value retained in advance,

outputting the determination result showing that an operation of the voltage controlling target block is normal, when the error detection signal corresponds with the expected value, and

applying a voltage indicating the control signal as the voltage controlling target block voltage, if the determination result shows that an operation of the voltage controlling target block is normal.

16 . The power supplying method of the semiconductor device according to claim 13 , wherein

the voltage controlling target block includes a counter configured to count a standby time in the standby mode, and

the step (c) includes:

setting, as the error detection signal, a count value outputted from the counter.

17 . The power supplying method of the semiconductor device according to claim 16 , wherein

the step (c) includes:

outputting a count value corresponding to one of the plurality of voltages, and

determining whether the count value corresponds with the expected value.

18 . The power supplying method of the semiconductor device according to claim 17 , further comprising:

(d) supplying a first timing and a second timing, wherein

the step (c) includes:

reading, as the expected value, a count value at the time when the voltage controlling target block operates normally for a period of time from the first timing to the second timing,

setting the count value supplied from the voltage controlling target block at the first timing, as a first count value,

setting the count value supplied from the voltage controlling target block at the second timing, as a second count value, and

determining whether an operation of the voltage controlling target block is normal, based on a comparison the expected value with a difference between the first count value and the second count value.