System-in-package and manufacturing method of the same
View Patent ↗The present invention discloses a structure of package comprising: a substrate with a die receiving through hole and a contact conductive via formed therein, a die disposed within the die receiving through hole, a surrounding material filled in the gap except the die area of the die receiving though hole, a re-distribution layer formed on the substrate and coupled to the contact conductive via, a protection layer formed over the re-distribution layer, a cover material formed over the protection layer; and a terminal contact pad formed on the lower surface of the substrate and under the contact conductive via and the die to couple the contact conductive via.
1. A structure of semiconductor device package comprising:
a substrate with a die receiving through-hole and a contact conductive via formed therein;
a die disposed within said die receiving through-hole, wherein a space is provided within said die receiving through-hole;
a surrounding material filled into said space within said die receiving though-hole;
a re-distribution layer formed on said substrate and coupled to said contact conductive via;
a protection layer formed over said re-distribution layer;
a cover material formed over said protection layer; and
a terminal contact pad formed on a lower surface of said substrate and under said contact conductive via and said die to couple said contact conductive via.
2. The structure of claim 1 , further comprising conductive bumps coupled to said terminal contact pad.
3. The structure of claim 1 , wherein said substrate and said die have the same level.
4. The structure of claim 1 , wherein said re-distribution layer comprises Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.
5. The structure of claim 1 , wherein the material of said substrate includes epoxy type FR5 or FR4.
6. The structure of claim 1 , wherein the material of said substrate includes BT, silicon, PCB (print circuit board) material, glass or ceramic.
7. The structure of claim 1 , wherein the material of said substrate includes alloy or metal.
8. The structure of claim 1 , wherein said surrounding material includes a dielectric material.
9. The structure of claim 8 , wherein said dielectric material includes an elastic dielectric material, a photosensitive material, a silicone dielectric based layer, siloxane polymer layer, polyimides (PI) layer or silicone resin layer.
10. The structure of claim 1 , wherein said substrate and said contact conductive via have the same level.