IP Library Granted Patent US 8,237,059
Granted Patent B2
US 8,237,059 · App. 12/219,355 · Granted Aug 7, 2012

Electronic component-embedded board and method of manufacturing the same

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Quick Facts
Patent No.
US 8,237,059
App. No.
12/219,355
Granted
Aug 7, 2012
Kind
B2
Abstract

A method of manufacturing an electronic component-embedded board is provided which is capable of suppressing warpage without requiring complicated processes at low cost and which offers high productivity and economic efficiency. A worksheet 100 includes insulating layers 21 and 31 on one surface of an approximately rectangular substrate 11 , and an electronic component 41 and a plate-like frame member (member) 51 embedded inside the insulating layer 21 , wherein the plate-like frame member 51 satisfying the relationship represented by the following formula (1): α 1<α3 and α 2<α3 . . . (1), is mounted on an unmounted portion of the electronic component 41 on the substrate 11 . In the formula, α 1, α2 and α 3 respectively denote the linear coefficients of thermal expansion (ppm/K) of the electronic component 41 , the plate-like frame member 51 , and the substrate 11 , the respective wiring layers or the respective insulating layers.

Claims (32)

1. A method of manufacturing an electronic component-embedded board, comprising:

a step of preparing a substrate;

a step of mounting an electronic component on the substrate;

a step of mounting a member on an electronic component-unmounted portion of the substrate;

a step of forming an insulating layer on the substrate so as to cover the electronic component and the member; and

a step of forming a wiring layer on at least one of the substrate and the insulating layer,

wherein the member satisfies a relation represented by the following formula (I),

α1<α3 and α2<α3  (1),

in which

α 1 is the linear coefficient of thermal expansion of the electronic component (ppm/K),

α 2 is the linear coefficient of thermal expansion of the member (ppm/K), and

α 3 is the linear coefficient of thermal expansion of the substrate, the wiring layer or the insulating layer (ppm/K), and

the member has a spatial volume ratio occupied within the insulating layer that decreases in a direction towards an outer periphery of the substrate.

2. The method of manufacturing an electronic component-embedded board according to claim 1 , wherein

the step of mounting the member includes mounting the member so as to surround the electronic component.

3. The method of manufacturing an electronic component-embedded board according to claim 1 , wherein

the step of mounting the member includes mounting the electronic component and the member on approximately the same plane.

4. The method of manufacturing an electronic component-embedded board according to claim 1 , wherein

as the member, a member is used that is thinner than the electronic component.

5. An electronic component-embedded board comprising:

a substrate;

an electronic component mounted on the substrate;

a member mounted on an electronic component-unmounted portion of the substrate;

an insulating layer formed so as to cover the electronic component and the member; and

a wiring layer formed on at least one of the substrate and the insulating layer,

wherein the member satisfies a relation represented by the following formula (I),

α1<α3 and α2<α3  (1),

in which

α 1 is the linear coefficient of thermal expansion of the electronic component (ppm/K),

α 2 is the linear coefficient of thermal expansion of the member (ppm/K), and

α 3 is the linear coefficient of thermal expansion of the substrate, the wiring layer or the insulating layer (ppm/K), and

the member has a spatial volume ratio occupied within the insulating layer that decreases in a direction towards an outer periphery of the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2008
From: KANEMARU, YOSHIKAZU; MORITA, TAKAAKI; KAWABATA, KENICHI
To: TDK CORPORATION
Reel/Frame 021307/0113 →