Semiconductor device with strain
View Patent ↗A semiconductor device includes: a semiconductor substrate having a p-MOS region; an element isolation region formed in a surface portion of the semiconductor substrate and defining p-MOS active regions in the p-MOS region; a p-MOS gate electrode structure formed above the semiconductor substrate, traversing the p-MOS active region and defining a p-MOS channel region under the p-MOS gate electrode structure; a compressive stress film selectively formed above the p-MOS active region and covering the p-MOS gate electrode structure; and a stress released region selectively formed above the element isolation region in the p-MOS region and releasing stress in the compressive stress film, wherein a compressive stress along the gate length direction and a tensile stress along the gate width direction are exerted on the p-MOS channel region. The performance of the semiconductor device can be improved by controlling the stress separately for the active region and element isolation region.
1. A semiconductor device comprising:
a semiconductor substrate having a p-channel type transistor region;
an element isolation region formed in a surface portion of said semiconductor substrate, said element isolation region defining a p-channel type active region in said p-channel type transistor region;
a p-channel type gate electrode structure formed above said semiconductor substrate, traversing said p-channel type active region and defining a p-channel region under said p-channel type gate electrode structure;
a first tensile stress film selectively formed above said element isolation region in said p-channel type transistor region; and
an insulating film selectively formed above said p-channel type active region and covering said p-channel type gate electrode structure, said insulating film being made of a same film as said first tensile stress film and releasing stress in said insulating film,
wherein said first tensile stress film above said element isolation region in said p-channel type transistor region exerts a tensile stress on said p-channel region along a gate width direction.
2. The semiconductor device according to claim 1 , wherein said first tensile stress film and said insulating film are made of a silicon nitride film.
3. The semiconductor device according to claim 1 wherein:
said semiconductor substrate has also an n-channel type transistor region;
said element isolation region defines an n-channel active region in said n-channel type transistor region; and
the semiconductor device further comprises:
an n-channel type gate electrode structure formed above said semiconductor substrate, traversing said n-channel type active region and defining an n-channel region under said n-channel type gate electrode structure; and
a second tensile stress film formed above said n-channel type transistor region and covering said n-channel type gate electrode structure, said second tensile stress film being made of a same film as said first tensile stress film.
4. The semiconductor device according to claim 1 , wherein said semiconductor substrate is a silicon substrate having a (001) plane and the gate length direction is along <110> direction.