IP Library › Granted Patent US 7,795,755
Granted Patent B2
US 7,795,755 · App. 12/222,245 · Granted Sep 14, 2010

Simple circuit and method for improving current balance accuracy of a power converter system

Assignee: Richtek Technology Corp.
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Quick Facts
Patent No.
US 7,795,755
App. No.
12/222,245
Granted
Sep 14, 2010
Kind
B2
Abstract

A power converter system includes multiple converter modules connected to a share bus. Each of the converter modules mirrors the phase current of itself to provide a mirror current to the share bus, extracts an average current from the share bus, and compares the phase current of itself with the average current it extracts from the share bus to produce an output signal for modulation of the phase current of itself. Specifically, each of the converter modules is provided with a resistor connected to the share bus such that all the resistors are connected in parallel, and thus each of the resistors automatically receives an average current from the share bus.

Claims (24)

1. A circuit for improving current balance accuracy of a power converter system having a plurality of converter modules connected to a share bus, the circuit comprising:

a first component, the first component forming a first resistor;

a current mirror connected to the first component and the share bus, and mirroring a phase current to provide a first mirror current to the first component to derive a first signal representative of the phase current and a second mirror current to the share bus;

a second component connected to the share bus and extracting an average current from the share bus to derive a second signal representative of the average current, the second component forming a second resistor; and

a comparator connected to the first and second components, and comparing the first signal with the second signal to produce an output signal for modulation of the phase current;

wherein the first and second resistors have substantially the same resistance.

2. The circuit of claim 1 , wherein the second resistors in each of the converter modules comprise a substantially same resistance.

3. A method for improving current balance accuracy of a power converter system having a plurality of converter modules connected to a share bus, the method comprising:

mirroring a phase current to provide a mirror current flowing through a resistor to derive a voltage across the resistor as a first signal;

extracting an average current from the share bus;

generating a second signal representative of the average current; and

comparing the first signal with the second signal to produce an output signal for the modulation of the phase current:

wherein the step of extracting an average current from the share bus comprises the steps of:

connecting a plurality of resistors to the share bus such that the resistors are connected in parallel, each of the converter modules being provided with one of the resistors; and

mirroring the phase current to provide a mirror current to the share bus;

wherein the resistor and the plurality of resistors have substantially the same resistance.

4. The method of claim 3 , wherein the plurality of resistors comprise a substantially same resistance.

5. A method for improving current balance accuracy of a power converter system having a plurality of converter modules connected to a share bus, each of the converter modules having a phase current, the method comprising:

mirroring each of the phase currents to provide mirror currents to the share bus, each of the mirror currents flowing through a first resistor;

each of the converter modules extracting an average current from the share bus; and

each of the converter modules comparing the phase current of itself with the average current it extracts from the share bus to produce an output signal for modulation of the phase current of itself;

wherein the step of each of the converter modules extracting an average current from the share bus comprises connecting a plurality of second resistors to the share bus such that the second resistors are connected in parallel to obtain the average current from the share bus, each of the converter modules being provided with one of the second resistors;

wherein the first and second resistors have substantially the same resistance.

6. The method of claim 5 , wherein the plurality of second resistors comprise a substantially same resistance.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2008
From: CHEN, ISAAC Y.; TANG, CHIEN-FU
To: RICHTEK TECHNOLOGY CORP.
Reel/Frame 021441/0395 →
Priority Claims (1)
TW 96129659 A · Aug 10, 2007 · national
Continuity (1)
Related Publication 20090039704A1 · Feb 12, 2009