Method and circuit configuration for simulating fault states in a control unit
A method and a circuit configuration for simulating fault states in a control unit, as well as a computer program and a computer-program product, are provided. In this context, a multiplexer and a fault-generating circuit are used, the multiplexer being realized using a relay technology, and the fault-generating circuit being implemented using a semiconductor technology.
1. A method for simulating a fault state in a control unit, terminals of which are connected to a fault-generating circuit via a multiplexer that is realized using a relay technology, the fault-generating circuit being implemented using a semiconductor technology, the method comprising:
simulating the fault state using the fault-generating circuit, wherein the simulating of the fault state includes: a) pre-configuring a fault in a first step by switching a relay and a first Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET); and b) subsequently activating the pre-configured fault in a second step by switching one of the first MOSFET and a second MOSFET.
2. The method as recited in claim 1 , wherein the simulating of the fault includes simulating a line interruption.
3. The method as recited in claim 1 , wherein the simulating of the fault includes simulating a short-circuit at a selected potential of a voltage.
4. The method as recited in claim 1 , wherein the simulating of the fault includes simulating a contact corrosion at a control-unit terminal.
5. The method as recited in claim 1 , wherein the simulating of the fault includes simulating a short-circuit of two control-unit terminals.
6. The method as recited in claim 1 , wherein the simulating of the fault includes simulating a crosstalk between two control-unit terminals.
7. The method as recited in claim 1 , wherein the simulating of the fault includes simulating line losses due to leakage currents at a control-unit terminal.
8. The method as recited in claim 1 , wherein the multiplexer and the fault-generating circuit communicate via bidirectional signal lines.
9. The method as recited in claim 1 , wherein:
the fault state is a line interruption between a terminal of the control unit and one of a sensor and an actuator;
the fault is a connection of the terminal to one of the sensor and the actuator via a first rail and a second rail that are interconnected by the one of the first MOSFET and the second MOSFET; and
the line interruption is activated in the second step by opening the connecting MOSFET.
10. The method as recited in claim 1 , wherein:
the fault state is a short circuit of a terminal of the control unit at a voltage potential;
the fault is a connection of the terminal to the second MOSFET, which second MOSFET is connected to the voltage potential; and
the fault state is activated by switching the second MOSFET to a conductive state.
11. A circuit arrangement configured to simulate a fault state in a control unit, comprising:
a multiplexer realized using a relay technology; and
a fault-generating circuit connected to the multiplexer via a signal line;
wherein:
the fault-generating circuit is implemented using a semiconductor technology;
the fault-generating circuit generates a fault; and
the simulating of the fault state includes: a) pre-configuring a fault in a first step by switching a relay and a first Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET); and b) subsequently activating the pre-configured fault in a second step by switching one of the first MOSFET and a second MOSFET.
12. The circuit configuration as recited in claim 11 , wherein the fault-generating circuit includes a transistor logic.
13. The circuit configuration as recited in claim 12 , wherein the transistor logic is implemented using at least one of the first and the second MOSFET.
14. The circuit configuration as recited in claim 12 , further comprising: a microcontroller configured to control a simulation of the fault.
15. A non-transitory computer-readable storage medium storing a computer program having program codes which program codes, when executed on a computer, control a method for simulating a fault state in a control unit, terminals of which are connected to a fault-generating circuit via a multiplexer that is realized using a relay technology, the fault-generating circuit being implemented using a semiconductor technology, the method comprising:
simulating the fault state, wherein the simulating of the fault state includes: a) pre-configuring a fault in a first step by switching a relay and a first Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET); and b) subsequently activating the pre-configured fault in a second step by switching one of the first MOSFET and a second MOSFET.