Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor device including a silicon substrate and a field effect transistor including a gate insulating film on the silicon substrate, a gate electrode on the gate insulating film, and source/drain regions formed in the substrate on opposite sides of the gate electrode, wherein the gate electrode includes a silicide layer containing an Ni 3 Si crystal phase, at least in a portion of the gate electrode, the portion including a lower surface thereof, and the transistor includes an adhesion layer containing a metal oxide component, between the gate insulating film and the gate electrode.
1. A semiconductor device comprising:
a silicon substrate;
a P type channel field effect transistor comprising a first gate insulating film on the silicon substrate, a first gate electrode on the first gate insulating film, and source/drain regions formed in the substrate on opposite sides of the first gate electrode; and
an N type channel field effect transistor including a second gate insulating film on the silicon substrate, a second gate electrode on the second gate insulating film, and source/drain regions formed in the substrate on opposite sides of the second gate electrode,
wherein in the P type channel field effect transistor,
the first gate insulating film comprises a silicide oxide layer or a silicon oxynitride layer at least in a portion of the first gate insulating film, the portion including an upper surface thereof,
the first gate electrode comprises a silicide layer containing a first-conductivity-type impurity element and an Ni 3 Si crystal phase, at least in a portion of the gate electrode, the portion including a lower surface thereof, and
the P type channel field effect transistor comprises an adhesion layer containing a metal oxide component, between the first gate insulating film and the first gate electrode, and
in the N type channel field effect transistor,
the second gate insulating film comprises a silicide oxide layer or a silicon oxynitride layer at least in a portion of the second gate insulating film, the portion including an upper surface thereof,
the second gate electrode comprises a silicide layer containing a second conductivity type impurity element and an Ni 3 Si crystal phase, at least in a portion of the gate electrode, the portion including a lower surface thereof, and
the N type channel field effect transistor comprises an adhesion layer containing a metal oxide component, between the second gate insulating film and the second gate electrode.
2. The semiconductor device according to claim 1 , wherein the silicide layer containing the Ni 3 Si crystal phase is formed of a silicide expressed by a composition formula Ni x Si 1-x (0.6<x<0.9).
3. The semiconductor device according to claim 1 , wherein on the silicide layer containing the Ni 3 Si crystal phase, a low resistance layer with a lower resistance than the silicide layer is provided.
4. The semiconductor device according to claim 1 , wherein an oxide component of the adhesion layer comprises a metal oxide selected from the group consisting of Hf, Ta, Zr, La, Ti, Y, and Al.
5. The semiconductor device according to claim 2 , wherein an oxide component of the adhesion layer is a metal oxide selected from the group consisting of Hf, Ta, Zr, La, Ti, Y, and Al.
6. The semiconductor device according to claim 2 , wherein on the silicide layer containing the Ni 3 Si crystal phase, a low resistance layer with a lower resistance than the silicide layer is provided.
7. The semiconductor device according to claim 3 , wherein the low resistance layer comprises a silicide layer containing a nickel monosilicide crystal phase.
8. The semiconductor device according to claim 4 , wherein as the adhesion layer, a metal oxide of 0.01 to 0.1 mL (monolayer) in terms of molecular layers is formed.
9. A method of manufacturing the semiconductor device as recited in claim 1 , the method comprising:
preparing a semiconductor substrate including a p-type active region and an n-type active region;
forming, on the silicon substrate, a gate insulating film comprising a silicon oxide film or a silicon oxynitride film on a uppermost surface side;
forming an adhesion layer on the gate insulating film;
forming a polycrystalline silicon film on the gate insulating film with the adhesion layer formed thereon;
masking the polycrystalline silicon film on one of the active regions and adding a first-conductivity-type impurity element to the polycrystalline silicon film on the other active region;
masking the polycrystalline silicon film on the latter active region and adding a second-conductivity-type impurity element to the polycrystalline silicon film on the former active region;
forming a cap film on the polycrystalline silicon film;
forming a gate pattern of the polycrystalline silicon film including the cap film on an upper surface thereof;
masking one of the active regions and forming source/drain regions in the substrate on opposite sides of the gate pattern on the other active region;
masking the latter active region and forming source/drain regions in the substrate on opposite sides of the gate pattern on the former active region;
forming an interlayer insulating film all over a resulting surface;
removing a upper surface portion of the interlayer insulating film and the cap film to expose the polycrystalline silicon making up the gate pattern;
forming a nickel film all over a resulting surface; and
siliciding the polycrystalline silicon under the nickel film by heat treatment to form a silicide layer containing an Ni 3 Si crystal phase.
10. The method of manufacturing the semiconductor device according to claim 9 , further comprising:
after forming the silicide layer containing the Ni 3 Si crystal phase, forming a silicon film all over a resulting surface; and
diffusing nickel from the silicide layer into the silicon film by heat treatment to form a low resistance silicide layer containing a nickel monosilicide crystal phase.