Method and apparatus for managing cache reliability based on an associated error rate
View Patent ↗A method of configuring a cache includes identifying a plurality of cache configurations of a configurable cache for a processor-executable application unit. Each configuration has an associated error rate. A selected configuration is selected based at least in part on the associated error rate. The configurable cache is configured in accordance with the selected configuration for execution of the application-unit.
1. A method of configuring a cache, comprising:
(a) identifying a plurality of cache configurations of a configurable cache for a processor- executable application unit, wherein each configuration has an associated error rate;
(b) selecting a selected configuration based at least in part on the associated error rate, wherein the associated error rate is exclusive of cache misses; and
(c) configuring the configurable cache in accordance with the selected configuration for execution of the application unit, wherein the cache is configurable for storing specified types of information in defined areas of the cache, and wherein an error management for a given area is determined by the type of information specified for the given area.
2. The method of claim 1 wherein the cache is one of a unified cache and a split cache.
3. The method of claim 2 wherein the configurations correspond to combinations of way assignments for the unified cache.
4. The method of claim 1 wherein the associated error rate of the selected configuration does not exceed the associated error rate of any other configuration.
5. The method of claim 1 wherein (b) comprises selecting any selected configuration having an associated error rate that does not exceed a pre-determined threshold, ε T .
6. The method of claim 1 wherein the specified types of information for a given area include at least one of: exclusively data, exclusively instruction, and both data and instruction.
7. The method of claim 1 wherein error correction code error management is utilized for at least one defined area configured exclusively for instructions.
8. The method of claim 1 wherein parity error detection code error management is utilized for at least one defined area configured exclusively for data.
9. A method of configuring a cache, comprising:
(a) identifying a plurality of cache configurations of a configurable cache for a processor-executable application unit, wherein each configuration has an associated error rate and an associated performance rating;
(b) selecting a selected configuration based on both the associated error rate and the associated performance rating, wherein the associated error rate is exclusive of cache misses; and
(c) configuring the configurable cache in accordance with the selected configuration for execution of the application unit, wherein the cache is configurable for utilizing a specified error management for defined areas of the cache, and the cache is configurable for storing specified types of information in defined areas, and wherein the error management for a given area depends upon the specified type of information that the given area is configured for.
10. The method of claim 9 wherein the associated error rate of the selected configuration does not exceed the associated error rate of any other configuration.
11. The method of claim 9 wherein (b) comprises selecting any selected configuration having an associated error rate that does not exceed a pre-determined threshold, ε T .
12. The method of claim 9 wherein the associated performance rating of the selected configuration is not less than the associated performance rating of any configuration having an error rate that does not exceed a pre-determined threshold, ε T .
13. The method of claim 9 wherein (b) comprises selecting any selected configuration having a performance rating that is not less than a pre-determined threshold, P T .
14. The method of claim 9 wherein the associated error rate of the selected configuration is not greater than the associated error rate of any configuration having a performance rating that is not less than a pre-determined threshold, P T .
15. The method of claim 9 wherein the cache is configurable for storing specified types of information in defined areas, wherein the specified types of information for a given area include at least one of: exclusively data, exclusively instruction, and both data and instruction.
16. The method of claim 9 wherein error correction code error management is used for at least one defined area configured exclusively for instruction-type information.
17. The method of claim 9 wherein parity error detection code error management is utilized for at least one defined area configured exclusively for data-type information.