Method and system of digital signal processing

1. A system comprising:

a controller includes a control state machine configured to store control store addresses, and includes a control store memory configured to store data path instructions, wherein the controller is configured to identify one of the control store addresses stored in the control state machine and select one of the data path instructions stored in the control store memory with the identified control store address;

an address calculation device configured to store coefficient addresses and to select one of the coefficient addresses in response to a first portion of the selected data path instruction received from the control store memory; and

a data path device configured to identify a location of at least one filter coefficient stored by the data path device in response to the selected coefficient address received from the address calculation device, wherein the data path device is configured to perform digital filtering operations on digital data with the at least one filter coefficient in response to a second portion of the selected data path instruction received from the control store memory.

2. The system of claim 1 , wherein the second portion of the selected data path instruction is configured to direct the data path device to perform the digital filtering operations on the digital data.

3. The system of claim 1 , wherein the second portion of the selected data path instruction is configured to prompt the control store memory to issue one or more control signals that direct the data path device to perform specific digital filtering operation on the digital data.

4. The system of claim 1 , wherein the first portion of the selected data path instruction is configured to prompt the control store memory to issue one or more address control signals to identify one or more filter coefficients for the data path device to utilize when performing digital processing operations on the digital data.

5. The system of claim 1 , wherein the data path device includes a filter memory to store the filter coefficients for use during digital filtering operations on the digital data.

6. The system of claim 1 , further comprising

a system interface to receive one or more instruction sets from a microcontroller and to receive digital data, wherein the control state machine is configured to store control store addresses from the one or more instruction sets received by the system interface, wherein the address calculation device is accessible by the controller, and wherein the addresses stored by the address calculation device are indexable by the first portion of the data path instructions stored in the controller.

7. The system of claim 1 , wherein the control store memory is accessible by the control state machine, the data path instructions stored in the control store memory are indexable by one or more of the control store addresses stored by the control state machine.

8. A method comprising:

receiving, with a controller, control store addresses and data path instructions in instruction sets;

selecting, with the controller, at least one of the control store addresses based, at least in part, on a configuration of the controller;

identifying, with the controller, one of the data path instructions according to the selected control store address; and

providing, with the controller, a first portion of the identified data path instruction to an address calculation device storing filter addresses, wherein the address calculation device is configured to select one of the filer addresses with the first portion of the identified data path instruction; and

providing, with the controller, a second portion of the identified data path instruction to a data path device, wherein the data path device is configured to perform signal processing operations on digital data with at least one filter coefficient located in the data path device by the selected filter address from the address calculation device and in response to the second portion of the identified data path instruction received from the controller.

9. The method of claim 8 , wherein the second portion of the identified data path instruction includes an instruction capable of directing the data path device to perform digital filtering operations on the digital data.

10. The method of claim 8 , wherein the first portion of the identified data path includes at least one address control signal to identify one or more filter coefficients for the data path device to utilize when performing digital filtering operations on the digital data.

11. The method of claim 8 , further comprising:

populating the controller with the control store addresses and the data path instructions;

populating the data path device with the one or more filter coefficients; and

populating the address calculation device with the at least one address.

12. An apparatus comprising:

a control state machine capable of population with control store addresses according to instruction data received by a bus interface;

a control store memory accessible by the control state machine, the control store memory capable of population with data path instructions indexable by one or more of the control store addresses, wherein the control state machine is configured to identify one of the control store addresses stored and select one of the data path instructions stored in the control store memory with the identified control store address;

an address calculation device configured to store coefficient addresses and to select one of the coefficient addresses in response to a first portion of the selected data path instruction received from the control store memory; and

a data path device configured to identify a location of at least one filter coefficient stored by the data path device in response to the selected coefficient address received from the address calculation device, wherein the data path device is configured to perform digital signal processing operations on digital data with the at least one filter coefficient according to a second portion of the selected data path instruction received from the control store memory.

13. The apparatus of claim 12 , wherein the second portion of the selected data path instruction includes one or more control signals capable of configuring the data path device to perform digital filtering operations on the digital data.

14. The apparatus of claim 12 , wherein the first portion of the selected data path instruction includes at least one address control signal to identify one or more filter coefficients for the data path device to utilize when performing digital signal processing operations on the digital data.

15. The apparatus of claim 12 , wherein the data path device includes a memory to store filter coefficients included in the instructions for use during digital signal processing operations on the digital data.

16. The apparatus of claim 15 , wherein the address calculation device is capable of population with one or more coefficient addresses indexable by first portions of the data path instructions from the control store memory, wherein the data path device is configured to identify one or more of the filter coefficients for use during digital signal processing operations on the digital data according to the coefficient addresses from the address calculation device.

17. The apparatus of claim 12 , wherein the control state machine is configured to provide at least one of the control store addresses to the control store memory, and wherein the at least one of the control store address is configured to indicate an initial location for a sequential execution of a contiguous set of data path instructions.

18. The apparatus of claim 12 , wherein the control state machine further comprises:

a state machine memory to store the control store addresses; and

a finite state machine to store one or more addresses that identify a location of the control store addresses, wherein the state machine memory is configured to receive at least one of the addresses from the finite state machine and locate a corresponding control store address to provide to the control store memory.