IP Library Granted Patent US 7,847,350
Granted Patent B2
US 7,847,350 · App. 12/248,803 · Granted Dec 7, 2010

Transistor structure having a trench drain

Assignee: HVVi Semiconductors, Inc.
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Quick Facts
Patent No.
US 7,847,350
App. No.
12/248,803
Granted
Dec 7, 2010
Kind
B2
Abstract

A semiconductor device is formed having a trench adjacent to a current carrying region of the device. The trench is formed having a depth greater than the depth of a tub region of the device. Increasing the trench depth moves a region of higher field strength from the tub region to a region along the trench. The region along the trench does not have a junction and may withstand the higher field strength.

Claims (33)

1. A semiconductor device, comprising:

a tub region including a channel region of a transistor, the tub region being disposed at a first depth wherein the tub region has a conductivity type opposite to a conductivity type of a drain region of the transistor;

a trench formed in the drain region of the transistor to a second depth;

a dielectric layer overlying the trench;

wherein the second depth is greater than the first depth to reduce a field strength proximate to the tub region to increase a voltage breakdown of the transistor;

a pedestal disposed proximate to the trench;

a first conductive shield disposed in the trench approximately parallel to a sidewall of the trench; and

a second conductive shield at least partially disposed within the pedestal.

2. A semiconductor as claimed in claim 1 , wherein a region of maximum or nearly maximum field strength is located at or near a corner region of the trench substantially below a surface of the transistor such that the dielectric layer does not breakdown under the maximum or nearly maximum field strength.

3. A semiconductor as claimed in claim 1 , further comprising:

a first dopant of a same type as the drain region implanted in proximity to a surface of the drain region and in proximity to the channel region of the transistor to support current flow out of the channel region and into the drain region; and

a second dopant implanted through a sidewall of the trench to support current flow in proximity to the trench adjacent to the sidewall of the trench.

4. A semiconductor as claimed in claim 1 , wherein the first depth of the trench is greater than two times the second depth of the tub region to result in a correspondingly increased breakdown voltage of the transistor.

5. A semiconductor as claimed in claim 1 , further comprising a conductive shield disposed in the trench approximately parallel to a sidewall of the trench.

6. A semiconductor as claimed in claim 1 , further comprising a second trench at least partially disposed below the trench that is formed in the drain region of the transistor.

7. A semiconductor as claimed in claim 1 , wherein the second depth of the trench extends to a region away from a current carrying region of the transistor.

8. A semiconductor device, comprising:

a tub region including a channel region of a transistor, the tub region being disposed at a first depth wherein the tub region has a conductivity type opposite to a conductivity type of a drain region of the transistor;

a trench formed in the drain region of the transistor to a second depth;

a dielectric layer overlying the trench;

wherein the second depth is greater than the first depth to reduce a field strength proximate to the tub region to increase a voltage breakdown of the transistor; and

a second trench at least partially disposed below the trench that is formed in the drain region of the transistor.

9. A semiconductor as claimed in claim 8 , wherein a region of maximum or nearly maximum field strength is located at or near a corner region of the trench substantially below a surface of the transistor such that the dielectric layer does not breakdown under the maximum or nearly maximum field strength.

10. A semiconductor as claimed in claim 8 , further comprising:

a first dopant of a same type as the drain region implanted in proximity to a surface of the drain region and in proximity to the channel region of the transistor to support current flow out of the channel region and into the drain region; and

a second dopant implanted through a sidewall of the trench to support current flow in proximity to the trench adjacent to the sidewall of the trench.

11. A semiconductor as claimed in claim 8 , wherein the first depth of the trench is greater than two times the second depth of the tub region to result in a correspondingly increased breakdown voltage of the transistor.

12. A semiconductor as claimed in claim 8 , further comprising a conductive shield disposed in the trench approximately parallel to a sidewall of the trench.

13. A semiconductor as claimed in claim 8 , further comprising:

a pedestal disposed proximate to the trench;

a first conductive shield disposed in the trench approximately parallel to a sidewall of the trench; and

a second conductive shield at least partially disposed within the pedestal.

14. A semiconductor as claimed in claim 8 , wherein the second depth of the trench extends to a region away from a current carrying region of the transistor.

Assignments (3)
MERGER Recorded Dec 30, 2015
From: ESTIVATION PROPERTIES LLC
To: XENOGENIC DEVELOPMENT LIMITED LIABILITY COMPANY
Reel/Frame 037384/0135 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2013
From: HVVI SEMICONDUCTOR, INC.
To: ESTIVATION PROPERTIES LLC
Reel/Frame 030408/0580 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2008
From: DAVIES, ROBERT BRUCE
To: HVVI SEMICONDUCTORS, INC.
Reel/Frame 021761/0588 →
Continuity (1)
Related Publication 20100090269A1 · Apr 15, 2010