Method and system for using external storage to amortize CPU cycle utilization
View Patent ↗A method and system for using external storage to amortize CPU cycle utilization, wherein translated instructions are stored in a storage medium and subsequently accessed on a subsequent execution of a non-native application in order to amortize CPU cycles used in generating the translated instructions.
1. A method comprising:
storing a plurality of translated instructions in a location external to a processor, wherein the translated instructions correspond to a non-native application;
if execution of the non-native application is requested after a context switch, accessing the translated instructions from the location external to the processor; and
after said accessing, executing in the processor the translated instructions.
2. The method of claim 1 , wherein said storing comprises:
storing the translated instructions in a cache memory external to the processor.
3. The method of claim 1 , wherein said storing comprises:
storing the translated instructions in a system memory external to the processor.
4. The method of claim 1 , wherein said storing comprises:
storing the translated instructions in a disk memory external to the processor.
5. The method of claim 1 , wherein the translated instructions include pipeline instructions for the processor.
6. The method of claim 5 , wherein the pipeline instructions comprise very long instruction word (VLIW) instructions.
7. The method of claim 1 , wherein the translated instructions include a micro-architecture state of the processor.
8. The method of claim 1 , wherein the translated instructions include branch prediction information.
9. The method of claim 1 further comprising:
generating the translated instructions by using an instruction decoder.
10. An apparatus comprising:
means for executing a plurality of translated instructions, wherein the translated instructions correspond to a non-native application;
means for storing the translated instructions externally relative to the means for executing; and
means for accessing the translated instructions from the means for storing if execution of the non-native application is requested after a context switch.
11. The apparatus of claim 10 , wherein the means for storing comprises:
a cache memory external to the means for executing.
12. The apparatus of claim 10 , wherein the means for storing comprises:
a system memory external to the means for executing.
13. The apparatus of claim 10 , wherein the means for storing comprises:
a disk memory external to the means for executing.
14. The apparatus of claim 10 , wherein the translated instructions include pipeline instructions for the means for executing.
15. The apparatus of claim 14 , wherein the pipeline instructions comprise very long instruction word (VLIW) instructions.
16. The apparatus of claim 10 , wherein the translated instructions include a micro-architecture state of the means for executing.
17. The apparatus of claim 10 , wherein the translated instructions include branch prediction information.
18. The apparatus of claim 10 further comprising:
means for generating the translated instructions.
19. A computer-readable medium comprising computer-executable instructions stored therein, said computer-executable instructions comprising:
instructions to store a plurality of translated instructions in a location external to a processor, wherein the translated instructions correspond to a non-native application;
instructions to access the translated instructions from the location external to the processor if execution of the non-native application is requested after a context switch; and
instructions to execute in the processor the translated instructions after performing said instructions to access.
20. The computer-readable medium of claim 19 , wherein said instructions to store comprise:
instructions to store the translated instructions in a cache memory external to the processor.
21. The computer-readable medium of claim 19 , wherein said instructions to store comprise:
instructions to store the translated instructions in a system memory external to the processor.
22. The computer-readable medium of claim 19 , wherein said instructions to store comprise:
instructions to store the translated instructions in a disk memory external to the processor.
23. The computer-readable medium of claim 19 , wherein the translated instructions include pipeline instructions for the processor.
24. The computer-readable medium of claim 23 , wherein the pipeline instructions comprise very long instruction word (VLIW) instructions.
25. The computer-readable medium of claim 19 , wherein the translated instructions include a micro-architecture state of the processor.
26. The computer-readable medium of claim 19 , wherein the translated instructions include branch prediction information.
27. The computer-readable medium of claim 19 , wherein the computer-executable instructions further comprise:
instructions to generate the translated instructions by using an instruction decoder.