Light emitting diode having active region of multi quantum well structure
View Patent ↗Disclosed is a light emitting diode having an active region of a multi quantum well structure. The active region is positioned between GaN-based N-type and P-type compound semiconductor layers. At least one of barrier layers in the active region includes an undoped InGaN layer and a Si-doped GaN layer, and the Si-doped GaN layer is in contact with a well layer positioned at a side of the P-type compound semiconductor layer therefrom. Accordingly, carrier overflow and a quantum confined stark effect can be reduced, thereby improving an electron-hole recombination rate. Further, disclosed is an active region of a multi quantum well structure including relatively thick barrier layers and relatively thin barrier layers.
1. A light emitting diode (LED), comprising:
a GaN-based N-type compound semiconductor layer;
a GaN-based P-type compound semiconductor layer; and
an active region of a multi quantum well structure having InGaN well layers and barrier layers alternately laminated, the active region being interposed between the N-type and P-type compound semiconductor layers,
wherein at least one of the barrier layers in the active region includes an undoped InGaN layer and a Si-doped GaN layer, and the Si-doped GaN layer is positioned closer to the P-type compound semiconductor layer than the undoped InGaN layer.
2. The LED as claimed in claim 1 , wherein the Si-doped GaN layer is thinner than the undoped InGaN layer.
3. The LED as claimed in claim 1 , wherein each of barrier layers positioned between the well layers among the barrier layers includes the undoped InGaN layer and the Si-doped GaN layer.
4. The LED as claimed in claim 3 , wherein the barrier layers positioned between the well layers includes a plurality of relatively thick barrier layers having a thickness 1.3 to 3 times as large as that of the thinnest barrier layer positioned between the well layers and a plurality of relatively thin barrier layers having a thickness 1 to 1.3 times as large as that of the thinnest barrier layer.
5. The LED as claimed in claim 4 , wherein the relatively thick barrier layers and the relatively thin barrier layers are alternately laminated.
6. The LED as claimed in claim 1 , wherein a plurality of barrier layers among the barrier layers include the undoped InGaN layers, respectively; and the undoped-InGaN layers have a narrower bandgap as they are positioned closer to the N-type compound semiconductor layer.
7. The LED as claimed in claim 6 , wherein each of barrier layers positioned between the well layers among the plurality of barrier layers includes a Si-doped GaN layer.
8. An LED, comprising:
a GaN-based N-type compound semiconductor layer;
a GaN-based P-type compound semiconductor layer; and
an active region of a multi quantum well structure having well layers and barrier layers alternately laminated, the active region being interposed between the N-type and P-type compound semiconductor layers,
wherein the barrier layers are relatively thicker than the well layers; and the barrier layers positioned between the well layers include a plurality of relatively thick barrier layers having a thickness 1.3 to 3 times as large as that of the thinnest barrier layer and a plurality of relatively thin barrier layers having a thickness 1 to 1.3 times as large as that of the thinnest barrier layer.
9. The LED as claimed in claim 8 , wherein the plurality of relatively thin barrier layers and the plurality of relatively thick barrier layers are alternately laminated.
10. The LED as claimed in claim 9 , wherein each of the plurality of relatively thick barrier layers is a barrier layer doped with Si partially at a portion of the barrier layer closer to the P-type compound semiconductor layer.
11. The LED as claimed in claim 8 , wherein the barrier layers positioned between the well layers include barrier layers doped with Si partially at a portion of the barrier layer closer to the P-type compound semiconductor layer.
12. The LED as claimed in claim 8 , wherein at least one of the barrier layers positioned between the well layers includes an undoped InGaN layer and a Si-doped GaN; and the Si-doped GaN layer is positioned closer to the P-type compound semiconductor layer than the undoped InGaN layer.