Semiconductor device and manufacturing method thereof
View Patent ↗There have been provided a semiconductor device capable of preventing defects associated with etching, such as an increase in leak current, deterioration in film-coating properties and deterioration in transistor properties, and a method for manufacturing the semiconductor device. A CMOS transistor includes, on the same semiconductor substrate, an NMOS transistor having a gate electrode and a PMOS transistor having a gate electrode, wherein the former gate electrode includes a gate insulating film, a polycrystal silicon layer, a metal layer and another polycrystal silicon layer, and the latter gate electrode includes a gate insulating film, a metal layer and a polycrystal silicon layer.
1. A semiconductor device which comprises, on the same semiconductor substrate, an NMOS transistor having a first gate electrode and a PMOS transistor having a second gate electrode, wherein
said first gate electrode includes:
a first gate insulating film arranged on said semiconductor substrate;
a first semiconductor layer arranged on said first gate insulating film;
a first metallic material layer arranged on said first semiconductor layer; and
a second semiconductor layer arranged on said first metallic material layer, and
said second gate electrode includes:
a second gate insulating film arranged on said semiconductor substrate;
a second metallic material layer of the same kind as in said first gate electrode, arranged on and in touch with said second gate insulating film; and
a third semiconductor layer arranged on said second metallic material layer.
2. The semiconductor device according to claim 1 , wherein said second semiconductor layer and said third semiconductor layer consist of the same kind of semiconductor layer.
3. The semiconductor device according to claim 1 , wherein said first and second metallic material layers have a thickness of not smaller than 3 nm.
4. The semiconductor device according to claim 1 , wherein said first semiconductor layer is made of silicon whose conductivity type is an n type, and a work function of said first metallic material layer is in the range of 5.12 to 5.18 eV.
5. The semiconductor device according to claim 1 , wherein said first and second metallic material layers are made of Pt, Ir, Rn, Re, Os, Ti, Ru, or Mo.
6. The semiconductor device according to claim 1 , wherein said first and second metallic material layers are made of TiN, TaN, HfC, MoN, or RuO.
7. The semiconductor device according to claim 1 , wherein said first and second gate insulating films are made of hafnium oxide.
8. The semiconductor device according to claim 1 , wherein said first and second gate insulating films are made of hafnium silicon nitride oxide.
9. The semiconductor device according to claim 1 , wherein the first semiconductor layer is arranged on and in touch with said first gate insulating film.
10. The semiconductor device according to claim 9 , wherein said first metallic material layer is arranged on and in touch with the first semiconductor layer, said second semiconductor layer is arranged on and in touch with said first metallic material layer, and said third semiconductor layer is arranged on and in touch with said second metallic material layer.
11. The semiconductor device according to claim 1 , wherein said second and third insulating layers include polycrystal silicon layers.
12. The semiconductor device according to claim 1 , wherein said first to third semiconductor layers include polycrystal silicon layers each having n-type impurities.
13. A semiconductor device which comprises, on the same semiconductor substrate, an NMOS transistor having a first gate electrode and a PMOS transistor having a second gate electrode, wherein said first gate electrode includes:
a first gate insulating film arranged on said semiconductor substrate;
a first semiconductor layer of polycrystal silicon arranged on said first gate insulating film;
a first metallic material layer arranged on said first semiconductor layer, and
a second semiconductor layer of polycrystal silicon arranged on said first metallic material layer, and said second gate electrode includes:
a second gate insulating film arranged on said semiconductor substrate;
a second metallic material layer of the same kind as in said first gate electrode, arranged on said second gate insulating film; and
a third semiconductor layer of polycrystal silicon arranged on said second metallic material layer.
14. The semiconductor device according to claim 13 , wherein each of said first and second gate insulating films has hafnium elements and oxygen elements.
15. The semiconductor device according to claim 13 , wherein said first to third semiconductor layers have n-type impurities.