SEMICONDUCTOR DEVICE
A semiconductor device 1 includes: a copper interconnect layer 14 that has an interconnect containing an inductor 141, which is buried in an interconnect trench formed in an insulating layer 21; and copper interconnect layers 11 to 13, which include no inductor and are buried in interconnect trenches formed in other insulating layers 15, 17 and 19, respectively. An average grain size of the inductor 141 is larger than average grain sizes of the interconnects in the copper interconnect layers 11 to 13 that contain no inductor
1 . A semiconductor device, comprising:
a first copper interconnect layer, having an interconnect including an inductor and buried in an interconnect trench formed in a first insulating layer; and
a second copper interconnect layer containing no inductor and buried in an interconnect trench formed in a second insulating layer, said second copper interconnect layer having a second interconnect, said first and second copper interconnect layers being stacked,
wherein an average grain size of said inductor is larger than an average grain size of said second interconnect of said second copper interconnect layer containing no inductor.
2 . The semiconductor device as set forth in claim 1 , wherein a linewidth of said inductor along a section perpendicular to an elongating orientation of said inductor is equal to or higher than 5 μm.
3 . The semiconductor device as set forth in claim 1 , wherein an aspect ratio presented by (the thickness of said inductor)/(the linewidth of said inductor) is equal to or lower than 0.2.
4 . The semiconductor device as set forth in claim 1 , wherein an average grain size of said inductor is equal to or larger than 4 μm.
5 . The semiconductor device as set forth in claim 1 , wherein said inductor contains copper having plain orientation [200].
6 . The semiconductor device as set forth in claim 1 , wherein the size of the grain contained in said inductor is larger as approaching a center from a side wall of said interconnect trench along a cross section perpendicular to the elongating orientation of said inductor, said interconnect trench having said inductor buried therein.
7 . The semiconductor device as set forth in claim 1 , wherein, in a cross section perpendicular to the elongating orientation of said inductor, grains of copper having plain orientation [111] are disposed in a side of the side wall of said interconnect trench of said inductor, and grains of copper having plain orientation [200] are disposed in the central portion of said interconnect trench.
8 . The semiconductor device as set forth in claim 1 , wherein, the average grain size of said inductor is equal to or higher than 10 times the average grain size of the interconnect of said second copper interconnect layer containing no inductor.