IP Library Granted Patent US 7,994,414
Granted Patent B2
US 7,994,414 · App. 12/264,285 · Granted Aug 9, 2011

Semiconductor device

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Quick Facts
Patent No.
US 7,994,414
App. No.
12/264,285
Granted
Aug 9, 2011
Kind
B2
Abstract

A semiconductor device is disclosed that can operate utilizing thermoelectric concepts. According to an embodiment, the semiconductor device can comprise: a source/drain conductor formed of a line of metal material on a substrate; a first gate conductor formed of a second line of metal material; and a second gate conductor formed of a third line of metal material, wherein the first gate conductor is disposed adjacent a first portion of the source/drain conductor at one end of the source/drain conductor and the second gate conductor is disposed spaced apart from the first gate conductor and adjacent a second portion of the source/drain conductor at the other end of the source/drain conductor. By applying current to the first gate conductor and the second gate conductor, current can be supplied from the one end of the source/drain conductor to the other end of the source/drain conductor.

Claims (21)

1. A semiconductor device, comprising:

a source/drain conductor formed of a line of metal material on a substrate;

a first gate conductor formed of a second line of metal material, wherein the first gate conductor is disposed adjacent a first portion of the source/drain conductor at one end of the source/drain conductor; and

a second gate conductor formed of a third line of metal material, wherein the second gate conductor is disposed adjacent a second portion of the source/drain conductor at the other end of the source/drain conductor,

wherein the first gate conductor and the second gate conductor are supplied with a same current from a single circuit, or supplied each with a different current from different circuits, and

wherein the semiconductor device satisfies at least one condition of the group consisting of:

(a) the first gate conductor d the second gate conductor are formed of materials with different temperature constants such that the first gate conductor has a different temperature constant than the second gate conductor,

(b) the first gate conductor and the second gate conductor are formed having different sizes, and

(c) the first gate conductor and the second gate conductor are formed spaced apart from the source/drain conductor by different intervals.

2. The semiconductor device according to claim 1 , wherein the first gate conductor and the second gate conductor are disposed spaced apart from each other along a same side of the source/drain conductor.

3. The semiconductor device according to claim 1 , wherein the first gate conductor and the second gate conductor are arranged orthogonally about the source/drain conductor.

4. The semiconductor device according to claim 3 , wherein the first gate conductor is disposed on a same horizontal plane as the source/drain conductor, and wherein the second gate conductor is disposed on a same vertical plane as the source/drain conductor.

5. The semiconductor device according to claim 4 , wherein the second gate conductor is spaced apart from a top surface of the source/drain conductor by approximately the same distance as the first gate conductor is spaced apart from a side surface of the source/drain conductor.

6. The semiconductor device according to claim 4 , further comprising a first insulating layer upon which the first gate conductor and the source/drain conductor are formed; and a second insulating layer on the first gate conductor and the source/drain conductor, the second gate conductor being formed in the second insulating layer.

7. The semiconductor device according to claim 6 , wherein the first insulating layer and the second insulating layer comprise different material.

8. The semiconductor device according to claim 6 , wherein at least one of the first insulating layer and the second insulating layer comprises material with a thermal transfer constant.

9. The semiconductor device according to claim 6 , wherein a thickness of the second insulating layer is equal to or larger than a thickness of the second gate conductor.

10. The semiconductor device according to claim I, wherein the source/drain conductor is arranged as a straight line and at least one of the first gate conductor and the second gate conductor is arranged as a bent line in an “n” shape.

11. The semiconductor device according to claim 1 , wherein the source/drain conductor, the first gate conductor, and the second gate conductor are arranged in parallel on a single insulating layer.

12. The semiconductor device according to claim 11 , wherein the single insulating layer comprises material with a thermal transfer constant.

13. The semiconductor device according to claim 11 , wherein the single insulating layer is formed of a conductor having a thickness of between about 10 nm to about 20 nm.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2017
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 041465/0366 →
CORRECTIVE ASSIGNMENT TO CORRECT REMOVE PATENT NO. 878209 FROM EXHIBIT B PREVIOUSLY RECORDED AT REEL: 034009 FRAME: 0157. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 24, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034087/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2014
From: DONGBU HITEK, CO., LTD.
To: INPHI CORPORATION
Reel/Frame 034009/0157 →