Microresonator

1. A method for forming a microresonator comprising:

forming a sacrificial portion above a substrate;

forming a first semiconductor layer above the sacrificial portion structure;

forming, in the first semiconductor layer, at least one electrode area placed against or above a peripheral portion of the sacrificial portion;

forming an opening in the first semiconductor layer above the sacrificial portion, whereby said at least one electrode areas are level with the opening;

forming a sacrificial layer covering the bottom, the wall, and the edges of the opening;

forming a hole in the sacrificial layer at the bottom of the opening;

forming a second semiconductor layer on the sacrificial layer;

etching the second semiconductor layer to keep a portion forming a resonant element placed in the openings and slightly extending over the edges of the opening; and

removing the sacrificial portion and layer,

wherein the sacrificial portion and layer are formed of a material such as silicon-germanium which is selectively etchable with respect to the substrate, to the first semiconductor layer, and to the resonant element, and which is such that it enables forming a second single-crystal semiconductor layer at least in said opening.

2. The method of claim 1 , further comprising after the forming of the sacrificial silicon-germanium portion, the forming of an insulating portion above the sacrificial portion, the insulating portion being used as an etch stop layer on forming of the opening by etching of the first semiconductor layer.

3. The method of claim 1 , wherein the first and second semiconductor layers are silicon layers obtained by epitaxial growth, the resonant element being made of single-crystal silicon.

4. The method of claim 1 , wherein the sacrificial layer has a thickness of a few tens of nanometers.

5. The method of claim 1 , applied to the formation of a microresonator comprising a vertical detection transistor, and comprising, prior to the forming of the opening, a step of performing three successive implantations from a same lithography mask shifted to form three stepped doped areas, the lower doped area being placed against or above the sacrificial portion and the upper doped region being placed at the surface of the first semiconductor layer, the doped areas being possibly partially etched in the forming of the opening in the first semiconductor layer, whereby the three doped areas are level with the opening.

6. The method of claim 2 , applied to the formation of a microresonator comprising a vertical detection transistor, and comprising, prior to the forming of the opening, a step of performing three successive implantations from a same lithography mask shifted to form three stepped doped areas, the lower doped area being placed against or above the sacrificial portion and the upper doped region being placed at the surface of the first semiconductor layer, the doped areas being possibly partially etched in the forming of the opening in the first semiconductor layer, whereby the three doped areas are level with the opening, wherein the insulating portion does not cover the entire sacrificial portion, the three doped areas being formed above an exposed area of the sacrificial portion.