IP Library Granted Patent US 7,868,413
Granted Patent B2
US 7,868,413 · App. 12/267,166 · Granted Jan 11, 2011

Semiconductor device

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Quick Facts
Patent No.
US 7,868,413
App. No.
12/267,166
Granted
Jan 11, 2011
Kind
B2
Abstract

It is an object of the present invention to surely protect a predetermined semiconductor element or a predetermined semiconductor element group in an analog block from a noise generated from a digital block. A semiconductor device according to the present invention includes a semiconductor substrate, a digital block to be a region in which a digital circuit is formed and an analog block to be a region in which an analog circuit is formed, arranged by separating an upper surface of the semiconductor substrate and a substrate potential fixing region provided on the semiconductor substrate so as to surround in a planar view the predetermined semiconductor element group in the analog block, and a pad connected to the substrate potential fixing region and receiving a predetermined potential from an external part.

Claims (9)

1. A semiconductor device comprising:

a semiconductor substrate;

a digital block to be a region in which a digital circuit is formed;

an analog block to be a region in which an analog circuit is formed, the digital block and the analog block arranged by separating an upper surface of said semiconductor substrate;

a substrate potential fixing region provided on said semiconductor substrate so as to surround in a planar view a predetermined semiconductor element group or a predetermined semiconductor element in said analog block; and

a pad connected to said substrate potential fixing region and receiving a predetermined potential from an external part.

2. The semiconductor device according to claim 1 , wherein said pad applies a ground potential of said analog circuit.

3. The semiconductor device according to claim 1 , wherein said pad is used only for said substrate potential fixing region.

4. The semiconductor device according to claim 1 , wherein said substrate potential fixing region surrounds in a planar view each semiconductor element which is included in said semiconductor element group.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Sep 9, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025008/0390 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2008
From: OKUDA, TAKASHI; KUMAMOTO, TOSHIO
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 021804/0365 →