IP Library › Granted Patent US 8,269,608
Granted Patent B2
US 8,269,608 · App. 12/270,364 · Granted Sep 18, 2012

Device and method of coupling a processor to an RFID tag

Assignee: NCR Corporation
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Quick Facts
Patent No.
US 8,269,608
App. No.
12/270,364
Granted
Sep 18, 2012
Kind
B2
Abstract

A device and method of coupling a processor to an RFID tag which creates new applications for the RFID tag. The device includes an RFID tag which includes a memory, an antenna coupled to the RFID tag, and a processor coupled to the RFID tag in parallel with the antenna.

Claims (24)

1. A device comprising:

an RFID tag identifying an item and including a memory;

an antenna coupled to the RFID tag for wirelessly communicating with an RFID tag reader or writer; and

a processor coupled to the RFID tag in parallel with the antenna, wherein the RFID tag comprises communication circuitry coupled between the antenna and the memory for controlling wireless communication using standard RFID tag protocols with the RFID tag reader or writer and directly sending and receiving information from the processor using the same standard RFID tag protocols.

2. The device of claim 1 , further comprising a detector between the RFID tag and the processor.

3. The device of claim 1 , further comprising a filter between the RFID tag and the processor.

4. The device of claim 1 , wherein the processor reads data from the memory.

5. The device of claim 4 , wherein the data was stored in the memory by an RFID tag writer.

6. The device of claim 1 , wherein the processor stores data in the memory.

7. The device of claim 6 , wherein the processor stores the data for later interrogation by an RFID tag reader.

8. The device of claim 1 , further comprising a sensor coupled to the processor, wherein the processor stores data from the sensor in the memory for later interrogation by an RFID tag reader.

9. The device of claim 1 , further comprising a user interface coupled to the processor.

10. The device of claim 9 , wherein the user interface comprises a display.

11. The device of claim 9 , wherein the user interface comprises an input device.

12. The device of claim 1 , further comprising a power source coupled to the processor.

13. The device of claim 1 , wherein the processor controls another device based upon data the processor receives from the memory.

14. The device of claim 1 , wherein the processor applies power from a power source to activate another device based upon data the processor receives from the memory.

15. The device of claim 1 , wherein the memory functions as a mailbox to store messages between the processor and a computer which reads and writes the messages using an RFID tag reader-writer.

16. A device comprising:

an RFID tag including a memory, communication circuitry, and antenna terminals, wherein the communication circuit produces a first modulated signal having a first carrier frequency;

an antenna coupled to the antenna terminals;

a circuit coupled to the antenna terminals including a detector for detecting modulation in the first modulated signal and a filter for blocking the first modulated signal; and

a processor for receiving first data from an RFID tag reader-writer from the memory, and for sending second data to the memory for later retrieval by the RFID tag reader-writer through the antenna wherein the processor includes a data input terminal coupled to the detector for receiving the first data, and a data output terminal coupled to the filter for sending the second data, and wherein the processor generates a second modulated signal from the data output terminal having a second carrier frequency lower than the first carrier frequency and capable of passing through the filter with the second data to the RFID tag, wherein the communication circuitry is coupled between the antenna and the memory for controlling wireless communication using standard RFID protocols with the RFID tag reader or writer and directly sending and receiving information from the processor using the same standard RFID tag protocols.

17. The device of claim 16 , wherein the processor generates the second modulated signal by producing a clock signal for the second carrier signal and modulating the clock signal by switching the clock signal on and off.

Assignments (6)
CHANGE OF NAME Recorded Dec 7, 2023
From: NCR CORPORATION
To: NCR VOYIX CORPORATION
Reel/Frame 065820/0704 →
RELEASE OF PATENT SECURITY INTEREST Recorded Oct 25, 2023
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: NCR VOYIX CORPORATION
Reel/Frame 065346/0531 →
SECURITY INTEREST Recorded Oct 25, 2023
From: NCR VOYIX CORPORATION
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 065346/0168 →
SECURITY AGREEMENT Recorded Apr 18, 2016
From: NCR CORPORATION; NCR INTERNATIONAL, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 038646/0001 →
SECURITY AGREEMENT Recorded Jan 15, 2014
From: NCR CORPORATION; NCR INTERNATIONAL, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 032034/0010 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2008
From: CLAESSEN, ALBERTUS M.
To: NCR CORPORATION
Reel/Frame 021830/0287 →
Continuity (1)
Related Publication 20100117796A1 · May 13, 2010