IP Library Granted Patent US 8,243,381
Granted Patent B2
US 8,243,381 · App. 12/270,786 · Granted Aug 14, 2012

Systems and methods for sector address mark detection

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Quick Facts
Patent No.
US 8,243,381
App. No.
12/270,786
Granted
Aug 14, 2012
Kind
B2
Abstract

Various embodiments of the present invention provide systems and methods for sector address mark detection. As an example, data detection systems are disclosed that include a sector address mark detection circuit and a sector address mark quality detection circuit. The sector address mark detection circuit receives a data stream and identifies a sector address mark in the data stream. The sector address mark quality detection circuit receives a first sample and a second sample from the data stream corresponding to the sector address mark, and determines a quality of the sector address mark based at least in part on the first sample and the second sample. In various cases, one or more of the samples of the sector address mark up to all of the samples of the sector address mark may be used.

Claims (45)

1. A data detection system, the data detection system comprising:

a sector address mark detection circuit operable to receive a data stream and to identify a sector address mark in the data stream; and

a sector address mark quality detection circuit operable to compare a first sample corresponding to the sector address mark in the data stream with a quality threshold to provide a first result and to compare a second sample corresponding to the sector address mark in the data stream with the quality threshold to provide a second result.

2. The data detection system of claim 1 , wherein the data detection system further comprises:

a preamble detection circuit, wherein the preamble detection circuit is operable to identify a preamble pattern in the data stream.

3. The data detection system of claim 2 , wherein the data detection system further comprises:

a clock recovery circuit, wherein the clock recovery circuit is operable to adjust the phase of a sample clock based on the identified preamble pattern.

4. The data detection system of claim 1 , wherein the data stream is a series of digital samples derived from a storage medium.

5. The data detection system of claim 4 , wherein the storage medium includes a servo data region and a user data region, and wherein the servo data region includes servo data.

6. The data detection system of claim 1 , wherein the sector address mark quality detection circuit includes a comparator circuit operable to: perform the comparison of the first sample with the quality threshold, perform the comparison of the second sample with the quality threshold.

7. The data detection system of claim 6 , wherein the comparator circuit is a first comparator circuit, wherein the quality threshold is a first quality threshold, and wherein the sector address mark quality detection circuit further includes:

a second comparator circuit operable to compare a composite of the first result and the second result with a second quality threshold.

8. The data detection system of claim 7 , wherein the composite of the first result and the second result includes an indication of the number of the first result and the second result that are at a defined state.

9. The data detection system of claim 7 , wherein the composite of the first result and the second result provides an indication of the number of the first sample and the second sample that exceed the quality threshold.

10. The data detection system of claim 7 , wherein the composite of the first result and the second result provides an indication of the number of the first sample and the second sample that are below the quality threshold.

11. A method for performing data detection, the method comprising:

receiving a data stream;

querying the data stream for a preamble pattern;

detecting the preamble pattern in the data stream;

detecting a sector address mark in the data stream;

comparing the detected sector address mark against a quality threshold; and

wherein the sector address mark is below the quality threshold, restarting the query for the preamble.

12. The method of claim 11 , the method further comprising:

where the sector address mark is above the quality threshold, treating a subsequent portion of the data stream as servo data.

13. The method of claim 12 , wherein the servo data includes a Gray code pattern and burst information.

14. The method of claim 11 , wherein comparing the sector address mark against the quality threshold includes:

comparing a first sample from the data stream against the quality threshold to provide a first result; and

comparing a second sample from the data stream against the quality threshold to provide a second result.

15. The method of claim 14 , wherein the quality threshold is a first quality threshold, and wherein the method further comprises:

combining the first result with the second result to make a composite result; and

comparing the composite result with a second quality threshold.

16. The method of claim 15 , wherein combining the first result with the second result includes, summing at least the number of the first result and the second result that are at a defined threshold.

17. The method of claim 11 , wherein the data stream is a series of digital samples derived from a storage medium.

18. The method of claim 17 , wherein the storage medium includes a servo data region and a user data region, and wherein the servo data region includes servo data.

19. The method of claim 11 , wherein the method further comprises:

recovering a sample clock using the detected preamble.

20. A storage device, the storage device comprising:

a storage medium, wherein the storage medium includes a sector address mark;

an analog front end, wherein the analog front end is operable to sense information on the storage medium and to provide a series of digital samples corresponding to the information on the storage medium;

a sector address mark detection circuit, wherein the sector address mark detection circuit is operable to receive the series of digital samples and to identify the sector address mark in the series of digital samples; and

a sector address mark quality detection circuit, wherein the sector address mark quality detection circuit is operable to receive a first sample and a second sample from the series of digital samples corresponding to the sector address mark, and to determine a quality of the identified sector address mark based at least in part on a comparison of the first sample and the second sample with a quality threshold.

21. The storage device of claim 20 , wherein the quality threshold is a first quality threshold, and wherein the sector address mark quality detection circuit includes:

a first comparator, wherein the first comparator is operable to compare the first sample with the first quality threshold to provide a first result, and wherein the first comparator is operable to compare the second sample with the first quality threshold to provide a second result; and

a second comparator, wherein the second comparator is operable to compare a composite of the first result and the second result with a second quality threshold.

22. The storage device of claim 21 , wherein the composite of the first result and the second result includes an indication of the number of the first result and the second result that are at a defined state.

Assignments (11)
MERGER Recorded Mar 3, 2023
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; BROADCOM INTERNATIONAL PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 062952/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
To: BROADCOM INTERNATIONAL PTE. LTD.
Reel/Frame 053771/0901 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 09/05/2018 PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0133. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0456 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0133 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035365/0634 →
CERTIFICATE OF CONVERSION Recorded Aug 29, 2014
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 033663/0948 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2008
From: ANNAMPEDU, VISWANATH; MUDDHASANI, VENKATRAM
To: AGERE SYSTEMS INC.
Reel/Frame 021832/0017 →