IP Library Granted Patent US 7,825,652
Granted Patent B2
US 7,825,652 · App. 12/273,408 · Granted Nov 2, 2010

Method and apparatus for remotely buffering test channels

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Quick Facts
Patent No.
US 7,825,652
App. No.
12/273,408
Granted
Nov 2, 2010
Kind
B2
Abstract

A system is provided to enable leakage current measurement or parametric tests to be performed with an isolation buffer provided in a channel line. Multiple such isolation buffers are used to connect a single signal channel to multiple lines. Leakage current measurement is provided by providing a buffer bypass element, such as a resistor or transmission gate, between the input and output of each buffer. The buffer bypass element can be used to calibrate buffer delay out of the test system by using TDR measurements to determine the buffer delay based on reflected pulses through the buffer bypass element. Buffer delay can likewise be calibrated out by comparing measurements of a buffered and non-buffered channel line, or by measuring a device having a known delay.

Claims (14)

1. A method of measuring the delay of a buffer in a test circuit, the method comprising:

providing a signal pulse through the buffer;

measuring the signal pulse as reflected from a buffer bypass element provided between an input and output of the buffer; and

determining the delay introduced by the buffer from the reflected signal pulse using a time domain reflectometer calculation.

2. The method of claim 1 , wherein the buffer output is connected to a test probe.

3. A method of measuring the delay of a buffer in a test circuit, wherein the buffer is provided in a first transmission line, the method comprising:

measuring delay of the first transmission line and the buffer;

measuring delay of a second transmission line substantially similar to the first transmission line without a buffer; and

calculating the delay through the buffer by determining a difference between a delay through the first transmission line with the buffer and the delay through the second transmission line.

4. The method of claim 3 , wherein a buffer bypass element is provided between an input and an output of the buffer.

5. A method of calibrating out a delay of a buffer in a test circuit, the method comprising:

measuring a delay of a device having a known delay using the test device with the buffer; and

calibrating out the delay of the buffer by comparing the measured delay of the device with the known delay.

6. The method of claim 5 , wherein a buffer bypass element is provided between an input and an output of the buffer.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2025
From: HSBC BANK USA, NATIONAL ASSOCIATION
To: FORMFACTOR, INC.
Reel/Frame 072853/0001 →
SECURITY INTEREST IN UNITED STATES PATENTS AND TRADEMARKS Recorded Jul 12, 2016
From: FORMFACTOR, INC.; ASTRIA SEMICONDUCTOR HOLDINGS, INC.; CASCADE MICROTECH, INC.; MICRO-PROBE INCORPORATED
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 039184/0280 →