Method for automatic operating voltage detection
A method for automatic operating voltage detection, in which one internal supply voltage (vdd) is selected from at least two different external supply voltages, with a first external voltage supply (VDDA) being applied permanently, is based on the object of reducing the circuit complexity for automatic operating voltage detection, the operating current caused by the selection arrangement and the required chip area, in which case the voltage ratios between the two different external supply voltages can be as required. This object is achieved in that a reference voltage (Vref) and a voltage (VDDreg) is produced from the first external supply voltage (VDDA), the reference voltage (Vref) is compared with a second external supply voltage (VDDIO), and either the voltage (VDDreg) produced from the first external supply voltage (VDDA) or the second external supply voltage (VDDIO) is released as an internal supply voltage (vdd), depending on the comparison.
1. Method for automatic detection of operating voltage, in which a selection of an internal power supply voltage occurs from at least two different external power supply voltages, and a first external power supply voltage is permanently present, comprising the steps of: internally generating a reference voltage Vref and a voltage VDDreg from the first external power supply voltage VDDA, comparing the reference voltage Vref and a second external power supply voltage VDDIO, continuously releasing the voltage VDDreg internally generated from the first external power supply voltage VDDA as the internal power supply voltage except when the second external supply voltage VDDDIO is higher than the reference voltage Vref, and releasing the second external power supply voltage VDDIO as the internal power supply voltage when the second external power supply voltage VDDIO is higher than the reference voltage Vref.
2. Method according to claim 1 , wherein the second external power supply voltage VDDIO has a value greater than the reference voltage Vref.
3. Method according to claim 1 , wherein the second external power supply voltage VDDIO has a value smaller than the reference voltage Vref.