Reading a phase change memory
View Patent ↗A phase change memory cell may be read by driving a current through the cell higher than its threshold current. A voltage derived from the selected column may be utilized to read a selected bit of a phase change memory. The read window or margin may be improved in some embodiments. A refresh cycle may be included at periodic intervals.
1. A memory comprising:
an array of cells including lines;
a sense amplifier to sense a characteristic of a phase change memory cell while the cell is triggered; and
a reference generator coupled to a line coupled to a cell to be sensed, said reference generator generates a reference voltage for said sense amplifier, said reference generator to reduce a level of a signal from said line.
2. The memory of claim 1 wherein said reference generator stores a reference level from said line.
3. The memory of claim 2 wherein said generator outputs the reference level for comparison after a time delay.
4. The memory of claim 1 wherein said sense amplifier to sense whether a selected address line is above or below a reference level.
5. The memory of claim 1 wherein said sense amplifier to compare a level on an addressed line at two different times.
6. The memory of claim 5 wherein said sense amplifier compares levels after reducing the read current to a selected line.
7. The memory of claim 1 wherein said sense amplifier compares a reference voltage, generated before a read current to the selected line is reduced, to a voltage generated on the selected line after the read current is reduced.
8. The memory of claim 1 wherein said cell includes a phase change memory element and a select device.
9. The memory of claim 8 wherein said select device includes a nonprogrammable chalcogenide.
10. The memory of claim 1 wherein said sense amplifier to compare the reference voltage, generated before a read current to the selected line is reduced, to a voltage generated on the selected line after the read current is reduced and then increased.