IP Library Granted Patent US 8,201,052
Granted Patent B2
US 8,201,052 · App. 12/285,751 · Granted Jun 12, 2012

Data processing method of decoding coded data and data processor for the same

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Quick Facts
Patent No.
US 8,201,052
App. No.
12/285,751
Granted
Jun 12, 2012
Kind
B2
Abstract

For the coded data that was transmitted via a communication channel, a known code portion thereof that is a code portion corresponding to known data is detected. When the known code portion is not detected from the coded data, the coded data will be decoded. When the known code portion is detected from the coded data, at least a part thereof will be replaced with normal data, and the decoding will be performed on the coded data after the substitution.

Claims (40)

1. A data processor, comprising:

a storage unit which stores a normal data of a known code portion, the known code portion corresponding to a known data and being included in a coded data;

a receive unit which receives the coded data;

a known-code-portion detecting unit which detects the known code portion of the coded data received by the receive unit;

a substitution unit which replaces at least a part of the known code portion detected by the known-code-portion detecting unit, with the normal data stored in the storage unit; and

a decoder unit that, when there is none of the known code portion as a result of detection by the known-code-portion detecting unit, decodes the coded data received by the receive unit, and, when there is the known code portion detected by the known-code-portion detecting unit, decodes the coded da ta replaced by the substitution unit,

wherein the coded data comprises data that is convolutionally coded, the data processor further comprising:

a second storage unit which stores the known data; and

a second substitution unit that, when the known code portion was detected by the known-code-portion detecting unit, replaces a portion corresponding to the known data in decoded data of the coded data obtained by the decoder unit, with the known data stored in the second storage unit.

2. The data processor as claimed in claim 1 , wherein the known data comprises a code specified by a standard with which the receive unit is in conformity.

3. The data processor as claimed in claim 2 , wherein the known data comprises the code corresponding to a padding bit.

4. The data processor as claimed in claim 3 , wherein the known data comprises the code corresponding to a filler bit.

5. A data processor, comprising:

a storage unit which stores a normal data of a known code portion, the known code portion corresponding to a known data and being included in a coded data;

a receive unit which receives the coded data;

a known-code-portion detecting unit which detects the known code portion of the coded data received by the receive unit;

a substitution unit which replaces at least a part of the known code portion detected by the known-code-portion detecting unit, with the normal data stored in the storage unit; and

a decoder unit that, when there is none of the known code portion as a result of detection by the known-code-portion detecting unit, decodes the coded data received by the receive unit, and, when there is the known code portion detected by the known-code-portion detecting unit, decodes the coded data replaced by the substitution unit,

wherein the coded data comprises data that is turbo coded,

wherein the decoder unit includes two decoders and an intermediate memory and repeats an operation of making the two decoders execute respectively at earlier and later times,

wherein the intermediate memory stores an intermediate data that includes respective execution results of the two decoders, and

wherein each of the two decoders, at a time of execution by one of the two decodes, reads the intermediate data that was obtained by the other of the two decoders just before the execution by the one from the intermediate memory, and

wherein the data processor further comprises:

a second storage unit which stores the normal data of a portion corresponding to the known data that may be included in the intermediate data; and

a second substitution unit that, when the known code portion was detected by the known-code-portion detecting unit, replaces at least a part of the intermediate data corresponding to the known data, with the normal data stored in the second storage unit.

6. The data processor as claimed in claim 5 , wherein the known data comprises a code specified by a standard with which the receive unit is in conformity.

7. The data processor as claimed in claim 6 , wherein the known data comprises the code corresponding to a padding bit.

8. The data processor as claimed in claim 7 , wherein the known data comprises the code corresponding to a filler bit.

9. A data processor, comprising:

a storage unit which stores a normal data of a known code portion, the known code portion corresponding to a known data and being included in a coded data;

a receive unit which receives the coded data;

a known-code-portion detecting unit which detects the known code portion of the coded data received by the receive unit;

a substitution unit which replaces at least a part of the known code portion detected by the known-code-portion detecting unit, with the normal data stored in the storage unit;

a decoder unit that, when there is none of the known code portion as a result of detection by the known-code-portion detecting unit, decodes the coded data received by the receive unit, and, when there is the known code portion detected by the known-code-portion detecting unit, decodes the coded data replaced by the substitution unit;

a demodulator which is responsive to the coded data to produce a control data packet and a user data packet;

an input memory which receives the user data packet and includes the storage unit; and

a controller which receives an information relating to the control data packet, and produces a substitution parameter to identify the known data.

10. The data processor as claimed in claim 9 , wherein the known data comprises a code specified by a standard with which the receive unit is in conformity.

11. The data processor as claimed in claim 10 , wherein the known data comprises the code corresponding to a padding bit.

12. The data processor as claimed in claim 11 , wherein the known data comprises the code corresponding to a filler bit.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0175 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2008
From: ORIO, MASAO; TAKANASHI, MITSUNORI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 021740/0183 →