IP Library Granted Patent US 7,951,665
Granted Patent B2
US 7,951,665 · App. 12/292,116 · Granted May 31, 2011

Semiconductor device having capacitor formed on plug, and method of forming the same

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Quick Facts
Patent No.
US 7,951,665
App. No.
12/292,116
Granted
May 31, 2011
Kind
B2
Abstract

A semiconductor device includes a silicon substrate, a capacitor element having a lower electrode, a capacitor dielectric film, a TiN film, and a W film, and an interlayer insulation film covering the end and a portion of the upper surface of the lower electrode and disposed with a concave portion at a position corresponding to the lower electrode. The lower electrode is disposed selectively at the bottom of the concave portion, the upper surface of the lower electrode is exposed from the interlayer insulation film in the region for forming the concave portion, the side wall for the concave portion of the interlayer insulation film situates to the inner side of the lower electrode from the end of the lower electrode, and the capacitor dielectric film is disposed so as to cover the upper surface of the lower electrode and cover the interlayer insulation from the side wall for the concave portion to the upper surface of the interlayer insulation film.

Claims (28)

1. A method of manufacturing a semiconductor device, comprising:

forming first and second connection plugs at a substantially identical level over a semiconductor substrate;

forming a lower electrode covering an upper surface of the first connection plug and an electrode covering an upper surface of the second connection plug, the electrode being disposed apart from the lower electrode;

forming a first insulation film covering the lower electrode and the electrode;

selectively removing the first insulation film to expose a portion over a surface of the lower electrode, thereby forming a concave portion with an upper surface of the lower electrode being as a bottom surface, and with a lateral side of the first insulation film being as a side wall;

forming a capacitor dielectric film for covering the upper surface of the lower electrode, the side wall of the first insulation film, and an upper surface of the first insulation film, from the bottom of the concave portion to an outside of the concave portion over the first insulation film formed with the concave portion;

forming an upper electrode opposed to the lower electrode and in contact with the capacitor dielectric film so as to fill an inside of the concave portion;

removing the first insulation film over the electrode selectively to form a connection hole after the forming the upper electrode; and

forming a first conduction film so as to fill the connection hole and removing the first conduction film disposed to an outside of the connection hole, thereby forming a third connection plug to be connected with the second connection plug via the electrode.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the second connection plug is disposed in contact with an impurity diffusion region disposed on the semiconductor substrate.

3. The method of manufacturing a semiconductor device according to claim 2 , further comprising:

forming a gate electrode above the semiconductor substrate;

forming first and second impurity diffusion regions on sides of the gate electrode; and

forming a second insulation film for covering the semiconductor substrate,

wherein the forming of the first and the second connection plugs includes:

selectively removing the second insulation film over the first and second impurity diffusion regions, thereby forming first and second connection holes; and

forming a second conduction film comprising a copper-containing metal film so as to fill the first and second connection holes and removing the second conduction film disposed to an outside of the connection holes, thereby forming the first and second connection plugs connected to the first and second impurity diffusion regions.

4. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a bit line to be connected to the third connection plug.

5. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first conduction film includes a copper-containing metal.

6. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

after forming the upper electrode, forming an interlayer insulation film over the upper electrode and the first insulation film, and

removing a portion of the interlayer insulation film over the electrode.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein the upper electrode comprises a TiN film disposed on the capacitor dielectric film and a W film disposed on the TiN film.

8. The method of manufacturing a semiconductor device according to claim 1 , wherein the lower electrode is disposed entirely below the first insulation film.

9. The method of manufacturing a semiconductor device according to claim 1 , wherein the lower electrode and the electrode are formed substantially simultaneously.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0175 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2008
From: INOUE, KEN; INOUE, TOMOKO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 021897/0728 →