Data processing device and control method for preventing an exception caused by an instruction sent to a peripheral device by a branch source program from occurring during execution of a branch destination program or interrupt program
View Patent ↗A data processing device includes a program execution section to supply an operation direction signal to a peripheral device based on an executed program and execute a branch operation in response to a branch direction signal, and a branch wait operation section to receive the branch direction signal and a peripheral device status notification signal indicating whether an operation performed in the peripheral device is being executed. The branch wait operation section outputs an instruction issue stop signal directing waiting of the branch operation to the program execution section if the branch direction signal is input during a period when the peripheral device status notification signal is active indicating that the operation in the peripheral device is being executed.
1. A data processing device comprising:
a program execution section to supply an operation direction signal to a peripheral device based on an executed program and execute a branch operation in response to a branch direction signal; and
a branch wait operation section to receive the branch direction signal and a peripheral device status notification signal indicating whether an operation performed in the peripheral device is being executed,
wherein the branch wait operation section outputs an instruction issue stop signal directing waiting of the branch operation to the program execution section when the branch direction signal is input during a period when the peripheral device status notification signal is active indicating that the operation in the peripheral device is being executed.
2. The data processing device according to claim 1 , wherein
the program execution section executes the branch operation after waiting of the branch operation by the instruction issue stop signal is released.
3. The data processing device according to claim 1 , wherein
when the program execution section receives an exception notification signal notifying occurrence of an exception of processing in the peripheral device during a period when the instruction issue stop signal directs waiting of the branch operation, the program execution section executes exception handling based on the exception notification signal before executing the branch operation based on release of waiting of the branch operation by the instruction issue stop signal.
4. The data processing device according to claim 1 , wherein
the branch direction signal includes a branch request signal generated based on a program executed in the program execution section, an interrupt request signal output from an interrupt control section placed as a different block from the program execution section, and a system call generated based on a program executed in the program execution section.
5. The data processing device according to claim 1 , wherein
when a plurality of peripheral devices to operate based on the operation direction signal are coupled to the program execution section, the peripheral device status notification signal becomes active when indicating that at least one of the plurality of peripheral devices is executing an operation.
6. The data processing device according to claim 1 , wherein execution of a branch destination program is performed after an operation of a branch source program ends, the branch source program comprising instructions executed before the branch operation, and the branch destination program comprising a newly executed program after the branch operation.
7. The data processing device according to claim 6 , wherein an operation of a first program is executed after an operation of a second program is completed by using the branch wait operation section, the second program being configured for execution on said data processing device and the first program being configured for execution on both said data processing device and another data processing device.
8. A control method of a data processing device, the method comprising:
supplying, by a program execution section, an operation direction signal to a peripheral device based on an executed program and executing, by the program execution section, a branch operation in response to a branch direction signal;
receiving, by a branch wait operation section, the branch direction signal and a peripheral device status notification signal indicating whether an operation performed in the peripheral device is being executed,
wherein the branch wait operation section outputs an instruction issue stop signal directing waiting of the branch operation to the program execution section when the branch direction signal is input during a period when the peripheral device status notification signal is active indicating that the operation in the peripheral device is being executed.
9. The control method of the data processing device according to claim 8 , wherein the data processing device executes the branch operation after waiting of the branch operation is released.
10. The control method of the data processing device according to claim 8 , wherein
when an occurrence of an exception of processing is notified from the peripheral device during a period when waiting of the branch operation is directed, the data processing device executes exception handling on the peripheral device before executing the branch operation based on release of waiting of the branch operation.
11. The control method of the data processing device according to claim 8 , wherein
the branch direction signal includes a branch request signal generated based on a program executed in the data processing device, and an interrupt request signal output from an interrupt control section to control an interrupt request from another peripheral device.
12. A data processing device comprising:
a program execution section to supply an operation direction signal to a peripheral device based on an executed program and execute a branch operation in response to a branch direction signal; and
a branch wait operation section to receive the branch direction signal and a peripheral device status notification signal indicating whether an operation performed in the peripheral device is being executed,
wherein the branch wait operation section outputs an instruction issue stop signal directing waiting of the branch operation to the program execution section when the branch direction signal is input during a period when the operation in the peripheral device is being executed, and
wherein the program execution section executes the branch operation after waiting of the branch operation by the instruction issue stop signal is released.
13. The data processing device according to claim 12 , wherein the program execution section comprises an instruction issue section, a primary instruction execution section and a branch instruction execution section, the instruction issue section selecting an instruction to be executed next based on a program and issues the selected instruction as an instruction issue signal to the primary instruction execution section and the branch instruction execution section.
14. The data processing device according to claim 13 , wherein the instruction issue section receives branch direction signals comprising a branch request signal and an interrupt request signal and performs a branch operation that changes a program to be executed based on the branch request signal or the interrupt request signal.
15. The data processing device according to claim 13 , wherein the instruction issue section receives an exception notification signal and an instruction issue stop signal, and wherein when the exception notification signal is input, the instruction issue section performs exception handling on processing that has notified the exception.
16. The data processing device according to claim 15 , wherein when the instruction issue stop signal is input, the instruction issue section waits to issue an instruction based on the instruction issue stop signal, and
wherein the primary instruction execution section executes instructions other than a branch instruction which are issued by the instruction issue section, and wherein the primary instruction execution section outputs an operation direction signal that gives an operation direction to a coprocessor and a memory controller according to a kind of instruction, the coprocessor performing processing different from a central processing unit based on the operation direction signal that is output from the primary instruction execution section.
17. The data processing device according to claim 13 , wherein the branch instruction execution section outputs a branch request signal that notifies an address of a branch destination program and execution of a branch instruction when an instruction output from the instruction issue section is the branch instruction, and wherein the branch request signal is transmitted to the instruction issue section and the branch wait operation section.
18. The data processing device according to claim 17 , wherein execution of the branch destination program is performed after an operation of a branch source program ends, the branch source program comprising instructions executed before the branch operation, and the branch destination program comprising a newly executed program after the branch operation.
19. The data processing device according to claim 13 , wherein the branch wait operation section receives the branch direction signal, the peripheral device status notification signal indicating whether an operation performed in the peripheral device is being executed, and an exception notification signal, wherein when the branch direction signal is input during a peripheral device processing period when the peripheral device status notification signal indicates that the operation in the peripheral device is being executed, the branch wait operation section outputs an instruction issue stop signal that directs waiting of the branch operation to the program execution section.
20. The data processing device according to claim 19 , wherein the branch direction signal involves a branch request signal output from the branch instruction execution section and an interrupt request signal output from the interrupt control section, and
wherein the instruction issue stop signal directs waiting of the branch operation when the instruction issue stop signal is in an active state, and the instruction issue stop signal directs release of waiting of the branch operation when the instruction issue stop signal is in an inactive state.