IP Library › Granted Patent US 8,159,829
Granted Patent B2
US 8,159,829 · App. 12/295,119 · Granted Apr 17, 2012

Relay substrate, method for manufacturing the relay substrate and three-dimensional circuit device using the relay substrate

Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,159,829
App. No.
12/295,119
Granted
Apr 17, 2012
Kind
B2
Abstract

Relay substrate ( 1 ) connecting between at least a first circuit board and a second circuit board, including housing ( 10 ) having recess ( 10 a ) provided in the outer circumference and hole ( 22 ) provided in the inner circumference; plural connecting terminal electrodes ( 12 a, 12 c ) connecting between the top and bottom surfaces of housing ( 10 ); shield electrode ( 11 ) provided in recess ( 10 a ); and ground electrode ( 13 ) provided on a part of the top and bottom surfaces of housing ( 10 ).

Claims (17)

1. A relay substrate comprising:

a housing of quadrangle shape having a hole and projection parts positioned at four corners;

a plurality of connecting terminal electrodes provided continuously on top and bottom surfaces of the housing and on an inner circumference of the hole;

a shield electrode provided on an entire surface of an outer circumferential side of the housing except for the projection parts at the four corners; and

a ground electrode provided on portions of the projections parts at the four corners positioned on the top and bottom surfaces of the housing, and connected to the shield electrode.

2. The relay substrate of claim 1 , wherein the connecting terminal electrode is provided on the top and bottom surfaces of the housing through the inner circumferential side of the hole.

3. The relay substrate of claim 1 , wherein the connecting terminal electrode is composed of a conductive via through the top and bottom surfaces of the housing.

4. A three-dimensional circuit device wherein the device is connected between at least a first circuit board and a second circuit board through the relay substrate of claim 1 .

5. The three-dimensional circuit device of claim 4 , wherein a circuit component is implemented on at least one of the first circuit board and the second circuit board.

6. A relay substrate connecting between at least a first circuit board and a second circuit board, comprising:

a housing having a recess provided in an outer circumference and a hole provided in an inner circumference;

a plurality of connecting terminal electrodes connecting between top and bottom surfaces of the housing;

a first shield electrode provided in the recess; and

a ground electrode provided on a part of the top and bottom surfaces of the housing, and connected to the first shield electrode,

wherein, a second shield electrode is provided on the inner circumferential side of the hole.

7. A three-dimensional circuit device wherein the device is connected between at least a first circuit board and a second circuit board through the relay substrate of claim 6 .

8. The three-dimensional circuit device of claim 7 , wherein a circuit component is implemented on at least one of the first circuit board and the second circuit board.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2008
From: MORI, MASATO; KOMYOJI, DAIDO; NAGAI, KOICHI; YAGI, YOSHIHIKO
To: PANASONIC CORPORATION
Reel/Frame 021920/0586 →
Priority Claims (1)
JP 2006-107348 · Apr 10, 2006 · national
Continuity (1)
Related Publication 20090321122A1 · Dec 31, 2009