MOSFET device with reduced breakdown voltage

1. A semiconductor device formed on a substrate having a top surface, comprising:

a drain;

an epitaxial layer overlaying the drain; and

an active region comprising:

a body disposed in the epitaxial layer;

a source embedded in the body;

a gate trench extending into the epitaxial layer;

a gate disposed in the gate trench;

a contact trench extending through the source and at least part of the body;

a contact electrode disposed in the contact trench;

a diode enhancement layer disposed at least in part along a contact trench wall and at least in part along bottom of the contact trench;

an epitaxial enhancement portion disposed below the diode enhancement layer;

wherein the epitaxial enhancement portion has the same carrier type as the epitaxial layer; and

the diode enhancement layer has opposite carrier type as the epitaxial layer; and

wherein a distance between the top surface of the substrate and bottom of the epitaxial enhancement layer is shorter than a distance between the top surface of the substrate and bottom of the body.

2. The semiconductor device of claim 1 , wherein the epitaxial enhancement portion is arranged to reduce breakdown voltage of a Schottky diode formed by the contact electrode and the drain.

3. The semiconductor device of claim 1 , wherein the epitaxial enhancement portion has a higher carrier concentration than the epitaxial layer.

4. The semiconductor device of claim 1 , wherein the active region further comprises a Shannon implant disposed below the contact trench and above the epitaxial enhancement portion, and the Shannon implant has opposite carrier type as the epitaxial layer.

5. The semiconductor device of claim 1 , wherein the semiconductor device has a wall-to-wall pitch size that is less than or equal to 1.4 μm.

6. The semiconductor device of claim 1 , wherein the epitaxial layer and the epitaxial enhancement portion are N-type.

7. The semiconductor device of claim 1 , wherein the epitaxial layer and the epitaxial enhancement portion are P-type.

8. The semiconductor device of claim 1 , wherein the diode enhancement layer is formed by a body contact implant that is in direct contact with the contact electrode.

9. The semiconductor device of claim 1 , wherein:

the diode enhancement layer is formed by a body contact implant that is in direct contact with the contact electrode;

dopant concentration of the diode enhancement layer is lower than that of the body contact implant; and

in reverse bias the diode enhancement layer is completely depleted, in forward bias the diode enhancement layer is not depleted.