Wiring structure and method for fabricating the same
A wiring structure has a silicon layer, a backing layer provided on the silicon layer, the backing layer comprising a copper alloy containing a manganese, and a copper layer provided on the backing layer, and a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, in which a manganese in the diffusion barrier layer is enriched compared with the backing layer.
1. A wiring structure, comprising:
a silicon layer comprising a semiconductor layer;
a backing layer provided on the silicon layer, the backing layer comprising a copper alloy including manganese;
a copper layer provided on the backing layer; and
a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, the diffusion barrier layer including manganese that is enriched compared with the manganese of the backing layer.
2. The wiring structure according to claim 1 , wherein the diffusion barrier layer comprises a silicon composing the silicon layer, a copper composing the backing layer, and the manganese moved to the interface when the silicon layer and the backing layer are heated.
3. The wiring structure according to claim 2 , wherein the diffusion barrier layer is in ohmic contact with the silicon layer.
4. The wiring structure according to claim 3 , wherein the backing layer provided on the silicon layer has a manganese concentration enough to form the diffusion barrier layer showing a diffusion barrier property.
5. The wiring structure according to claim 4 , wherein the copper layer comprises an oxygen free copper with a purity of 3N or more.
6. The wiring structure according to claim 1 , wherein the copper alloy comprises the manganese of 5 at % or more, a balance of a copper, and inevitable impurities.
7. The wiring structure according to claim 1 , wherein the enriched manganese is provided in the diffusion barrier layer at the interface between the silicon layer and the backing layer.
8. The wiring structure according to claim 1 , wherein the diffusion barrier layer comprises silicon from the silicon layer, copper from the backing layer, and the enriched manganese at the interface between the silicon layer and the backing layer.
9. The wiring structure according to claim 1 , wherein the electrical conductivity is maintained between the silicon layer and the copper layer.
10. The wiring structure according to claim 1 , wherein the silicon layer is in ohmic contact with the copper layer.
11. The wiring structure according to claim 1 , wherein the diffusion barrier layer comprises a silicon layer including silicon, a backing layer including copper, and the enriched manganese at the interface between the silicon layer of the diffusion barrier layer and the backing layer of the diffusion barrier layer.
12. The wiring structure according to claim 1 , wherein the enhanced manganese is configured to suppress a diffusion of copper from the backing layer into the silicon layer and a diffusion of silicon from the silicon layer into the backing layer.
13. The wiring structure according to claim 1 , wherein the diffusion barrier layer has a concentration of manganese that is greater than a concentration of manganese in the backing layer.
14. A method for fabricating a wiring structure, comprising:
forming a backing layer comprising a copper alloy including manganese on a silicon layer in an oxygen free atmosphere, the silicon layer including a semiconductor layer;
forming a copper layer on the backing layer; and
carrying out a heat treatment on the silicon layer and the backing layer to enrich the manganese at a region including an interface between the silicon layer and the backing layer, thereby forming a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer comprising manganese that is enriched compared with the manganese of the backing layer.
15. The method for fabricating a wiring structure according to claim 14 , wherein the copper alloy includes the manganese of 5 at % or more, a balance of a copper and inevitable impurities.
16. The method for fabricating a wiring structure according to claim 15 , wherein the heat treatment is carried out on the silicon layer and the backing layer at a temperature in a range from 200° C. to 300° C. in vacuum.
17. A wiring structure, comprising:
a silicon layer comprising a semiconductor layer;
a backing layer provided on the silicon layer, the backing layer comprising a copper alloy including manganese;
a copper layer provided on the backing layer; and
a diffusion barrier layer provided at a region including an interface between the silicon layer and the backing layer, the diffusion barrier layer including manganese that is enriched compared with the manganese of the backing layer,
wherein an electrical conductivity is provided between the silicon layer and the copper layer.
18. The wiring structure according to claim 17 , wherein the electrical conductivity is provided by the diffusion barrier layer.
19. A wiring structure, consisting of:
a silicon layer comprising a semiconductor layer;
a backing layer provided on the silicon layer, the backing layer comprising a copper alloy including manganese;
a copper layer provided on the backing layer; and
a diffusion barrier layer having an electrical conductivity, the diffusion barrier layer being provided at a region including an interface between the silicon layer and the backing layer, the diffusion barrier layer including manganese that is enriched compared with the manganese of the backing layer.