Nonvolatile semiconductor memory device and method of manufacturing the same

1 . A nonvolatile semiconductor memory device comprising:

a semiconductor substrate;

a control gate and a floating gate that are formed side by side on a gate insulating film on a channel region in said semiconductor substrate; and

an erase gate facing an upper surface of said floating gate,

wherein side surfaces of said floating gate include a first side surface and a second side surface that face each other, and

an interval between said first side surface and said second side surface becomes narrower from said upper surface towards a side of said semiconductor substrate.

2 . The nonvolatile semiconductor memory device according to claim 1 ,

wherein said upper surface of said floating gate is connected to said first side surface at a first side and to said second side surface at a second side, and said first side and said second side are located above said upper surface between said first side and said second side.

3 . The nonvolatile semiconductor memory device according to claim 1 , further comprising:

a first device isolation structure having a first projecting portion that projects from said semiconductor substrate; and

a second device isolation structure having a second projecting portion that projects from said semiconductor substrate,

wherein said first projecting portion has a first sloping surface connecting between an upper surface and a side surface of said first device isolation structure,

said second projecting portion has a second sloping surface connecting between an upper surface and a side surface of said second device isolation structure,

said first sloping surface and said second sloping surface face each other,

an interval between said first sloping surface and said second sloping surface becomes larger away from said semiconductor substrate,

said floating gate is sandwiched between said first projecting portion and said second projecting portion, and

said first side surface and said second side surface of said floating gate are in contact with said first sloping surface and said second sloping surface, respectively.

4 . The nonvolatile semiconductor memory device according to claim 1 ,

wherein said floating gate comprises two acute-angled portions formed by said upper surface and said first side surface and said second side surface, respectively, and

electrons in said floating gate are extracted to said erase gate through said two acute-angled portions.

5 . A nonvolatile semiconductor memory device comprising:

a semiconductor substrate;

a control gate and a floating gate that are formed side by side on a gate insulating film on a channel region in said semiconductor substrate; and

an erase gate facing an upper surface of said floating gate,

wherein a width of a bottom surface of said floating gate is smaller than a width of said upper surface of said floating gate.

6 . The nonvolatile semiconductor memory device according to claim 5 ,

wherein a side surface connecting between said upper surface and said bottom surface of said floating gate is curved.

7 . The nonvolatile semiconductor memory device according to claim 6 ,

wherein said floating gate comprises an acute-angled portion formed by said upper surface and said side surface, and

electrons in said floating gate are extracted to said erase gate through said acute-angled portion.