IP Library Granted Patent US 8,426,838
Granted Patent B2
US 8,426,838 · App. 12/324,871 · Granted Apr 23, 2013

Phase-change memory

Inventor: Frederick T Chen (Hsinchu, TW)
Assignee: Higgs Opl. Capital LLC
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Quick Facts
Patent No.
US 8,426,838
App. No.
12/324,871
Granted
Apr 23, 2013
Kind
B2
Abstract

A phase-change memory element with side-wall contacts is disclosed, which has a bottom electrode. A non-metallic layer is formed on the electrode, exposing the periphery of the top surface of the electrode. A first electrical contact is on the non-metallic layer to connect the electrode. A dielectric layer is on and covering the first electrical contact. A second electrical contact is on the dielectric layer. An opening is to pass through the second electrical contact, the dielectric layer, and the first electrical contact and preferably separated from the electrode by the non-metallic layer. A phase-change material is to occupy one portion of the opening, wherein the first and second electrical contacts interface the phase-change material at the side-walls of the phase-change material. A second non-metallic layer may be formed on the second electrical contact. A top electrode contacts the top surface of the outstanding terminal of the second electrical contact.

Claims (49)

1. A phase-change memory, comprising:

a bottom electrode;

a first non-metallic layer formed on the bottom electrode, exposing the periphery of the top surface of the bottom electrode;

a first electrical contact formed on the first non-metallic layer and electrically connected to the bottom electrode;

a dielectric layer formed on and covering the first electrical contact;

a second electrical contact formed on the dielectric layer, wherein the second electrical contact comprises an outstanding terminal;

an opening passing through the second electrical contact, the dielectric layer, and the first electrical contact and separated from the bottom electrode by the first non-metallic layer;

a phase-change material occupying at least one portion of the opening, wherein the first and second electrical contacts interface the phase-change material at the side-walls of the phase-change material;

a second non-metallic layer formed on and covering the second electrical contact and exposing a top surface of the outstanding terminal; and

a top electrode formed on the second non-metallic layer and directly contacting the top surface of the outstanding terminal of the second electrical contact.

2. The phase-change memory of claim 1 , wherein the bottom electrode and the first non-metallic layer formed thereon create a ladder-like configuration.

3. The phase-change memory of claim 1 , wherein the thickness of the first and second electrical contact are 10˜50 nm.

4. The phase-change memory of claim 1 , wherein the bottom electrode is separated from the phase-change material by the first non-metallic layer comprising a first etch stop layer.

5. The phase-change memory of claim 1 , wherein the first non-metallic layer is a dielectric.

6. The phase-change memory of claim 1 , wherein the first non-metallic layer is made of the phase-change material.

7. The phase-change memory as of claim 1 , wherein the first electrical contact is separated from the second electrical contact by a non-metallic layer.

8. The phase-change memory of claim 1 , wherein the phase-change material comprises In, Ge, Sb, Te, Ga, Sn, or combinations thereof.

9. The phase-change memory of claim 1 , wherein the first and second electrical contacts, respectively comprise Al, W, Mo, Ti, TiN, TiAlN, TiW, or TaN, or the phase-change material.

10. The phase-change memory of claim 1 , wherein the top and bottom electrodes, respectively, comprise Al, W, Mo, Ti, TiN, TiAlN, TiW, or TaN.

11. The phase-change memory of claim 1 , further comprising a second etch stop layer disposed within the dielectric layer.

12. A phase-change memory, comprising:

a bottom electrode;

a first electrical contact formed on the bottom electrode;

a dielectric layer formed on and covering the first electrical contact;

a second electrical contact formed on the dielectric layer, wherein the second electrical contact comprises an outstanding terminal;

an opening passing through the second electrical contact, the dielectric layer, and the first electrical contact and landing on the bottom electrode;

a phase-change material occupying at least one portion of the opening, wherein the first and second electrical contacts interface the phase-change material at the side-walls of the phase-change material; and

a top electrode formed on the top surface of the outstanding terminal of the second electrical contact.

13. The phase-change memory of claim 12 , further comprising a non-metallic layer located between the first electrical contact and the bottom electrode, wherein the bottom electrode and the non-metallic layer create a ladder-like configuration.

14. The phase-change memory of claim 12 , wherein the bottom electrode is separated from the phase-change material by a non-metallic layer comprising an etch stop material.

15. The phase-change memory of claim 14 , wherein the non-metallic layer comprises a dielectric material.

16. The phase-change memory of claim 14 , wherein the non-metallic layer comprises the phase-change material.

17. The phase-change memory of claim 12 , wherein the first electrical contact is separated from the second electrical contact by a non-metallic layer.

18. The phase-change memory of claim 12 , further comprising a non-metallic layer formed on and covering the second electrical contact, wherein the phase-change layer is located on the non-metallic layer, and wherein the top surface of the phase-change material is lower than that of the top surface of the non-metallic layer.

19. A phase-change memory, comprising

a first electrical contact;

a second electrical contact;

a dielectric layer located between the first electrical contact and the second electrical contact;

an opening passing through the first electrical contact, the second electrical contact, and the dielectric layer;

a phase-change material occupying at least a portion of the opening, wherein the first electrical contact and the second electrical contact both interface the phase-change material at a side-wall of the opening;

an outstanding terminal located at a first end of the second electrical contact, wherein a second end of the second electrical contact interfaces with the phase-change material; and

a top electrode electrically coupled to the outstanding terminal.

20. The phase-change memory of claim 19 , further comprising a bottom electrode electrically coupled to the first electrical contact.

21. The phase-change memory of claim 20 , wherein the opening extends to the bottom electrode.

22. The phase-change memory of claim 20 , further comprising a first non-metallic layer at least partially covering the bottom electrode, wherein the opening is separated from the bottom electrode by the first non-metallic layer.

23. The phase-change memory of claim 19 , wherein the opening is located below the top electrode.

24. The phase-change memory of claim 19 , further comprising:

a second non-metallic layer at least partially covering the second electrical contact and exposing a top surface of the outstanding terminal to the top electrode.

25. The phase-change memory of claim 19 , wherein the opening comprises a contiguous opening that passes through the first electrical contact, the second electrical contact, and the dielectric layer.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2026
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: HIGGS OPL. CAPITAL LLC
Reel/Frame 075733/0186 →
MERGER Recorded Dec 26, 2015
From: HIGGS OPL. CAPITAL LLC
To: GULA CONSULTING LIMITED LIABILITY COMPANY
Reel/Frame 037360/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2012
From: CHEN, FREDERICK T
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE; POWERCHIP SEMICONDUCTOR CORP.; NANYA TECHNOLOGY CORPORATION; PROMOS TECHNOLOGIES INC.; WINBOND ELECTRONICS CORP.
Reel/Frame 027572/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2011
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: HIGGS OPL. CAPITAL LLC
Reel/Frame 027364/0397 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2010
From: POWERCHIP SEMICONDUCTOR CORP.; NANYA TECHNOLOGY CORPORATION; PROMOS TECHNOLOGIES INC.; WINBOND ELECTRONICS CORP.
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Reel/Frame 024149/0102 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2008
From: CHEN, FREDERICK T
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE; POWERCHIP SEMICONDUCTOR CORP.; NANYA TECHNOLOGY CORPORATION; PROMOS TECHNOLOGIES INC.; WINDOND ELECTRONICS CORP.
Reel/Frame 021902/0638 →
Continuity (2)
Continuation In Part 12020489 · Jan 25, 2008
Related Publication 20090189142A1 · Jul 30, 2009