IP Library Granted Patent US 7,888,238
Granted Patent B2
US 7,888,238 · App. 12/330,745 · Granted Feb 15, 2011

Method of manufacturing semiconductor device having semiconductor formation regions of different planar sizes

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Quick Facts
Patent No.
US 7,888,238
App. No.
12/330,745
Granted
Feb 15, 2011
Kind
B2
Abstract

A wafer process material is prepared which has a plurality of semiconductor formation regions of different planar sizes, each including a low dielectric constant film/wiring line stack structure component. A laser beam is applied onto a dicing street of the necessary semiconductor formation region and onto its straight extension in order to remove partial areas of the low dielectric constant film/wiring line stack structure components of the necessary semiconductor formation region and the unnecessary semiconductor formation region so that first groove and the second groove are formed. A protective film is formed in the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component. An upper wiring line and a sealing film are formed on the protective film, and a semiconductor wafer is cut along the dicing street.

Claims (54)

1. A semiconductor device manufacturing method comprising:

preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region;

selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to the predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region;

forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component;

forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component;

forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region; and

cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street;

wherein preparing the semiconductor wafer comprises preparing a material in which a passivation film is formed on the low dielectric constant film/wiring line stack structure component; and

wherein a laser beam is applied before forming the first groove and the second groove, and a laser groove formation preliminary groove is formed in a region corresponding to the predetermined width area of the passivation film in the necessary semiconductor formation region except for the passivation film in the unnecessary semiconductor formation region.

2. The semiconductor device manufacturing method according to claim 1 , wherein the predetermined width area in forming the first groove and the second groove has substantially the same width as the dicing street.

3. The semiconductor device manufacturing method according to claim 1 , wherein forming the protective film in the second groove formed within the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component includes forming the protective film in the first groove around the necessary semiconductor formation region and in the second groove within the unnecessary semiconductor formation region.

4. A semiconductor device manufacturing method comprising:

preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region;

selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to the predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region;

forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component;

forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component;

forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region; and

cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street;

wherein forming the protective film in the second groove formed within the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component includes forming the protective film in the first groove around the necessary semiconductor formation region and in the second groove within the unnecessary semiconductor formation region, and removing the protective film formed in the first groove within the necessary semiconductor formation region except in the second groove formed within the unnecessary semiconductor formation region to form other grooves.

5. The semiconductor device manufacturing method according to claim 4 , wherein forming the upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component on the protective film in the necessary semiconductor formation region includes forming a foundation metal layer on the protective film, on the side surface of the protective film and on the side surface of the low dielectric constant film/wiring line stack structure component in the necessary semiconductor formation region, and on the protective film in the unnecessary semiconductor formation region.

6. The semiconductor device manufacturing method according to claim 5 , wherein forming the upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component on the protective film in the necessary semiconductor formation region includes forming an upper metal layer on the protective film in the necessary semiconductor formation region except in the protective film in the unnecessary semiconductor formation region.

7. The semiconductor device manufacturing method according to claim 6 , wherein forming the upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component on the protective film in the necessary semiconductor formation region includes removing at least the whole foundation metal layer formed on the protective film in the unnecessary semiconductor formation region.

8. The semiconductor device manufacturing method according to claim 7 , wherein forming the upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component on the protective film in the necessary semiconductor formation region includes forming a columnar electrode on the upper wiring line.

9. The semiconductor device manufacturing method according to claim 7 , wherein forming the sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line includes forming the sealing film on the protective film and in the other grooves within the necessary semiconductor formation region, and on the protective film in the unnecessary semiconductor formation region.

10. The semiconductor device manufacturing method according to claim 1 , wherein the predetermined width area in forming the first groove and the second groove includes the dicing street and has a width larger than the dicing street.

11. The semiconductor device manufacturing method according to claim 10 , wherein preparing the wafer process material is preparing a material in which a passivation film is formed on the low dielectric constant film/wiring line stack structure component.

12. A semiconductor device manufacturing method comprising:

preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region;

selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to a predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region;

forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component;

forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component;

forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region; and

cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street;

wherein the predetermined width area in forming the first groove and the second groove includes the dicing street and has a width larger than the dicing street;

wherein preparing the wafer process material comprises preparing a material in which a passivation film is formed on the low dielectric constant film/wiring line stack structure component; and

wherein, before forming the first groove and the second groove, laser groove formation preliminary grooves of the predetermined width area in the passivation film are formed in the necessary semiconductor formation region except for the passivation film in the unnecessary semiconductor formation region.

13. The semiconductor device manufacturing method according to claim 12 , wherein forming the protective film in the second groove formed within the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component includes forming the protective film in the first groove within the necessary semiconductor formation region and in the second groove within the unnecessary semiconductor formation region.

14. A semiconductor device manufacturing method comprising:

preparing, on one surface of a semiconductor wafer, a wafer process material, the wafer process material having a plurality of semiconductor formation regions comprising at least a first semiconductor formation region having a first planer size, and a second semiconductor formation region having a second planer size which is different from the first planer size, and the wafer process material including a low dielectric constant film/wiring line stack structure component in which a low dielectric constant film and a wiring line are stacked in each semiconductor formation region;

selecting the first semiconductor formation region as a necessary semiconductor formation region from among the semiconductor formation regions, selecting, as an unnecessary semiconductor formation region, the second semiconductor formation region from among the semiconductor formation regions, in which a dicing street for the necessary semiconductor formation region traverses the second semiconductor formation region, and applying a laser beam to the predetermined width area including the dicing street for the necessary semiconductor formation region and onto a straight extension of the predetermined width area in the wafer process material in order to form a first groove around the dielectric constant film/wiring line stack structure component of the necessary semiconductor formation region and a second groove in an area corresponding to the straight extension within the unnecessary semiconductor formation region;

forming a protective film in at least the second groove formed in the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component;

forming, on the protective film in the necessary semiconductor formation region, an upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component;

forming a sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line within the necessary semiconductor formation region; and

cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street;

wherein the predetermined width area in forming the first groove and the second groove includes the dicing street and has a width larger than the dicing street; and

wherein forming the protective film in the second groove formed within the unnecessary semiconductor formation region and on the low dielectric constant film/wiring line stack structure component includes forming the protective film in the first groove within the necessary semiconductor formation region and in the second groove within the unnecessary semiconductor formation region, and removing the protective film formed in the first groove within the necessary semiconductor formation region except in the second groove formed within the unnecessary semiconductor formation region to form another groove.

15. The semiconductor device manufacturing method according to claim 14 , wherein forming the upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component on the protective film in the necessary semiconductor formation region includes forming a foundation metal layer on the protective film, on the side surface of the protective film and on the side surface of the low dielectric constant film/wiring line stack structure component in the necessary semiconductor formation region, and on the protective film in the unnecessary semiconductor formation region.

16. The semiconductor device manufacturing method according to claim 15 , wherein forming the upper wiring line connected to the wiring line of the low dielectric constant film/wiring line stack structure component on the protective film in the necessary semiconductor formation region includes forming an upper metal layer on the protective film in the necessary semiconductor formation region except in the protective film in the unnecessary semiconductor formation region.

17. The semiconductor device manufacturing method according to claim 16 , wherein forming the sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line includes forming the sealing film in the groove within the necessary semiconductor formation region.

18. The semiconductor device manufacturing method according to claim 17 , wherein cutting the at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street is cutting the sealing film and the semiconductor wafer at the width of the dicing street smaller than the width of the predetermined width area.

19. The semiconductor device manufacturing method according to claim 16 , wherein forming the sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line includes forming the sealing film in the groove within the necessary semiconductor formation region.

20. The semiconductor device manufacturing method according to claim 19 , wherein cutting at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street is cutting the sealing film and the semiconductor wafer at the width of the dicing street smaller than the width of the predetermined width area.

21. The semiconductor device manufacturing method according to claim 13 , wherein forming the sealing film on the low dielectric constant film/wiring line stack structure component and on the upper wiring line includes forming the sealing film on the protective film in the necessary semiconductor formation region and on the protective film in the unnecessary semiconductor formation region.

22. The semiconductor device manufacturing method according to claim 21 , wherein cutting the at least one of the protective film and the sealing film, and the semiconductor wafer along the dicing street is cutting the sealing film, the protective film and the semiconductor wafer at the width of the dicing street smaller than the width of the predetermined width area.

Assignments (3)
CHANGE OF OWNERSHIP BY CORPORATE SEPARATION-TO CORRECT ASSIGNEE'S ADDRESS ON REEL 027465, FRAME 0812 Recorded Jan 6, 2012
From: CASIO COMPUTER CO., LTD.
To: TERAMIKROS, INC.
Reel/Frame 027492/0449 →
CHANGE OF OWNERSHIP BY CORPORATE SEPARATION Recorded Jan 3, 2012
From: CASIO COMPUTER CO., LTD.
To: TERAMIKROS, INC.
Reel/Frame 027465/0812 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: WAKISAKA, SHINJI; KANEKO, NORIHIKO
To: CASIO COMPUTER CO., LTD.
Reel/Frame 021946/0730 →