IP Library Granted Patent US 7,989,856
Granted Patent B2
US 7,989,856 · App. 12/335,701 · Granted Aug 2, 2011

Fin transistor

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Quick Facts
Patent No.
US 7,989,856
App. No.
12/335,701
Granted
Aug 2, 2011
Kind
B2
Abstract

A fin transistor includes: a substrate; a plurality of semiconductor fins formed on the substrate; a gate electrode covering a channel region of the semiconductor fins; and a member as a stress source for the semiconductor fins included in a region of the gate electrode and the region provided between the semiconductor fins, and the member being made of a different material from the gate electrode.

Claims (49)

1. A fin transistor comprising:

a substrate;

a plurality of semiconductor fins formed on the substrate;

a gate electrode covering a channel region of the semiconductor fins; and

a member as a stress source for the semiconductor fins buried in a region of the gate electrode and the region provided between the semiconductor fins, and

the member being made of a different material from the gate electrode, wherein

the member is made of a metal or a conductive compound, and is formed so as to cover a channel region in the semiconductor fin with a gate insulating film interposed therebetween.

2. The fin transistor according to claim 1 , wherein the gate electrode is made of a metal or a conductive compound, and

the member is made of a material having linear expansion coefficient different from that of the material of the gate electrode.

3. The fin transistor according to claim 1 , wherein the gate electrode is made of polysilicon, and

the member is made of a material having lattice constant different from that of polysilicon.

4. The fin transistor according to claim 1 , wherein the gate electrode is made of polysilicon, and

the member is made of amorphous silicon having density different from that of polysilicon.

5. The fin transistor according to claim 1 , wherein the gate electrode and the member are made of materials of the same conduction type.

6. The fin transistor according to claim 1 , further comprising a gate insulating film formed between a channel region in the semiconductor fins and the gate electrode, wherein

the member is formed at a portion lower than that of a bottom end of the gate insulating film on a side face of the semiconductor fins.

7. The fin transistor according to claim 1 , wherein an upper portion of the member is formed higher than a top faces of the semiconductor fins.

8. The fin transistor according to claim 1 , wherein an upper end of the member is formed on the approximately same level of top faces of the semiconductor fins.

9. A fin transistor comprising:

a substrate;

a plurality of semiconductor fins formed on the substrate;

a gate electrode covering a channel region of the semiconductor fins; and

a member as a stress source for the semiconductor fins buried in a region of the gate electrode and the region provided between the semiconductor fins, and

the member being made of a different material from the gate electrode, wherein

the member is formed at side faces of the semiconductor fins except top faces of the semiconductor fins, and the member is in contact with a gate insulating layer on the side faces of the semiconductor fins.

10. A fin transistor comprising:

a semiconductor substrate;

a plurality of semiconductor fins formed over the substrate so as to be isolated from the semiconductor substrate by an insulating layer;

a gate electrode covering a channel region of the semiconductor fins; and

a member as a stress source for the semiconductor fins buried in a region of the gate electrode and the region provided between the semiconductor fins, and

the member being made of a different material from the gate electrode, wherein

the member is made of a metal or a conductive compound, and is formed so as to cover a channel region in the semiconductor fin with a gate insulating film interposed therebetween.

11. The fin transistor according to claim 10 , wherein the gate electrode is made of a metal or a conductive compound, and

the member is made of a material having linear expansion coefficient different from that of the material of the gate electrode.

12. The fin transistor according to claim 10 , wherein the gate electrode is made of polysilicon, and

the member is made of a material having lattice constant different from that of polysilicon.

13. The fin transistor according to claim 10 , wherein the gate electrode is made of polysilicon, and

the member is made of amorphous silicon having density different from that of polysilicon.

14. The fin transistor according to claim 10 , wherein the gate electrode and the member are made of materials of the same conduction type.

15. The fin transistor according to claim 10 , further comprising a gate insulating film formed between a channel region in the semiconductor fins and the gate electrode, wherein

the member is formed at a portion lower than that of a bottom end of the gate insulating film on a side face of the semiconductor fins.

16. The fin transistor according to claim 10 , wherein an upper portion of the member is formed higher than top faces of the semiconductor fins.

17. The fin transistor according to claim 10 , wherein an upper end of the member is formed on the approximately same level of top faces of the semiconductor fins.

18. A fin transistor comprising:

a semiconductor substrate;

a plurality of semiconductor fins formed over the substrate so as to be isolated from the semiconductor substrate by an insulating layer;

a gate electrode covering a channel region of the semiconductor fins; and

a member as a stress source for the semiconductor fins buried in a region of the gate electrode and the region provided between the semiconductor fins, and

the member being made of a different material from the gate electrode, wherein the member is formed at side faces of the semiconductor fins except top faces of the semiconductor fins, and the member is in contact with a gate insulating layer on the side faces of the semiconductor fins.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2017
From: TOSHIBA CORPORATION
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 041333/0955 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2009
From: GOTO, MASAKAZU; AOKI, NOBUTOSHI; IZUMIDA, TAKASHI; OKANO, KIMITOSHI; INABA, SATOSHI; MIZUSHIMA, ICHIRO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 022249/0990 →