Dynamic random access memory controller
View Patent ↗A Dynamic Random Access Memory (DRAM) controller. The DRAM controller includes receiving a plurality of access requests from a plurality of user interfaces to access one or more DRAM devices. Further, the DRAM controller includes storing the plurality of access requests in a Content Addressable Memory (CAM). Furthermore, the DRAM controller includes updating at least one access request of the plurality of access requests to a Next Access Table. In addition, the DRAM controller includes determining at least one paramount access request of the plurality of access requests by a CAM based decision controller for employing a bypass operation in the CAM based decision controller, based on a plurality of pre-defined conditions. Further, the DRAM controller includes issuing the plurality of access requests to the one or more DRAM devices.
1. A memory controller comprising:
a content-addressable memory (CAM)-based Decision Control Module comprising:
a content-addressable memory (CAM) Access Storage Module storing a plurality of access requests;
a Next Access Table Module for storing the plurality of access requests; and
a decision logic module configured to:
compare a newly-received access request to a highest-priority stored access request, wherein the highest-priority stored access request is stored in the CAM Access Storage Module; and
determine that the newly-received access request should bypass the highest-priority stored access request;
update the Next Access Table Module to include the newly-received access request; and
a memory-access control interface configured to:
issue the newly-received access request from the Next Access Table Module to a memory device, wherein the newly-received access request is issued ahead of the highest-priority stored access request.
2. The memory controller of claim 1 , wherein the CAM-based decision control module further comprises bypass evaluation logic to make the determination that the newly-received access request should bypass the highest-priority stored access request.
3. The memory controller of claim 2 , wherein the bypass evaluation logic is configured to determine that the newly-received access request is a read request, an activate request, or a precharge request.
4. The memory controller of claim 3 , wherein the bypass evaluation logic is configured to determine that the newly-received access request is a page hit.
5. The memory controller of claim 4 , wherein the bypass evaluation logic is configured to determine that the newly-received access request is a legal request.
6. The memory controller of claim 5 , wherein the CAM-based decision control module is further configured to determine that the newly-received access request is legal based on a set of timing requirements.
7. The memory controller of claim 3 , wherein the bypass evaluation logic is configured to determine that the newly-received access request has a higher priority than the highest-priority stored access request.
8. The memory controller of claim 3 , wherein the newly-received access request is determined to be a read or write request, and wherein the CAM-based decision control module is further configured to determine that there is no conflict between newly-received access request and any access request currently stored in the CAM Access Storage Module.
9. One or more computer-readable non-transitory storage media embodying software operable when executed to:
store, in a content-addressable memory (CAM) Access Storage Module, a plurality of access requests;
compare a newly-received access request to a highest-priority stored access request, wherein the highest-priority stored access request is stored in the CAM Access Storage Module;
determine that the newly-received access request should bypass the highest-priority stored access request;
update a Next Access Table Module to include the newly-received access request; and
issue the newly-received access request from the Next Access Table Module to a memory device, wherein the newly-received access request is issued ahead of the highest-priority stored access request.
10. The media of claim 9 , wherein the CAM-based decision control module further comprises bypass evaluation logic to make the determination that the newly-received access request should bypass the highest-priority stored access request.
11. The media of claim 10 , wherein the bypass evaluation logic is configured to determine that the newly-received access request is a read request, an activate request, or a precharge request.
12. The media of claim 11 , wherein the bypass evaluation logic is configured to determine that the newly-received access request is a page hit.
13. The media of claim 12 , wherein the bypass evaluation logic is configured to determine that the newly-received access request is a legal request.
14. The media of claim 13 , wherein the CAM-based decision control module is further configured to determine that the newly-received access request is legal based on a set of timing requirements.
15. The media of claim 11 , wherein the bypass evaluation logic is configured to determine that the newly-received access request has a higher priority than the highest-priority stored access request.
16. The media of claim 11 , wherein the newly-received access request is determined to be a read or write request, and wherein the CAM-based decision control module is further configured to determine that there is no conflict between newly-received access request and any access request currently stored in the CAM Access Storage Module.
17. A method comprising:
storing, in a content-addressable memory (CAM) Access Storage Module, a plurality of access requests;
compare a newly-received access request to a highest-priority stored access request, wherein the highest-priority stored access request is stored in the CAM Access Storage Module;
determining, using bypass evaluation logic, that the newly-received access request should bypass the highest-priority stored access request;
updating a Next Access Table Module to include the newly-received access request; and
issuing the newly-received access request from the Next Access Table Module to a memory-access control interface, wherein the newly-received access request is issued ahead of the highest-priority stored access request.
18. The method of claim 17 , wherein the bypass evaluation logic is configured to determine that the newly-received access request is a page hit and that the newly-received access request is a legal request.
19. The method of claim 17 , wherein the bypass evaluation logic is configured to determine that the newly-received access request should bypass the highest-priority stored access request based on ages of the access requests stored in the CAM Access Storage, an order of the stored access requests, a number of accesses to a particular memory device, and a priority of the newly-received access request.
20. The method of claim 17 , wherein the newly-received access request is determined to be a read or write request, and wherein the bypass evaluation logic determines that there is no conflict between newly-received access request and any access request currently stored in the CAM Access Storage Module.