Non-volatile memory and method for sensing with pipelined corrections for neighboring perturbations
A page of non-volatile multi-level storage elements on a word line WLn is sensed in parallel while compensating for perturbations from a neighboring page on an adjacent word line WLn+1. First, the programmed thresholds of storage elements on WLn+1 are sensed in the time domain and encoded as time markers. This is accomplished by a scanning sense voltage increasing with time. The time marker of a storage element indicates the time the storage element starts to conduct or equivalently when the scanning sense voltage has reached the threshold of the storage element. Secondly, the page on WLn is sensed while the same scanning voltage with an offset level is applied to WLn+1 as compensation. In particular, a storage element on WLn will be sensed at a time indicated by the time marker of an adjacent storage element on WLn+1, the time when the offset scanning voltage develops an appropriate compensating bias voltage on WLn+1.
1. In a nonvolatile memory having an array of storage elements accessible by word lines and bit lines, providing a selected group of storage elements accessible by a selected word line and an adjacent group of storage elements accessible by an adjacent word line, a method of sensing the page of storage elements in parallel, comprising:
providing a first voltage having a first predetermined initial amplitude and a predetermined ramp rate;
with the application of said first voltage to the adjacent word line, determining for each storage element of the adjacent group a time marker indicating when an associated storage element begins to conduct current, thereby encoding the state of each storage element in the time-domain;
providing a second voltage having a second predetermined initial amplitude and a similar ramp rate to that of said first voltage; and
while simultaneously applying said second voltage to the adjacent word line, sensing each storage element of the selected group at a time indicated by the time marker of a storage element of said adjacent group next to said each storage element.
2. The method as in claim 1 , wherein:
said adjacent group of storage elements is programmed subsequent to those of said selected group.
3. The method as in claim 1 , wherein:
said first voltage increases monotonically with time.
4. The method as in claim 1 , wherein:
said first voltage has a predetermined constant ramp rate.
5. The method as in claim 1 , wherein the nonvolatile storage elements are part of flash memory cells.
6. The method as in claim 1 , wherein the array of nonvolatile storage elements is organized in a NAND configuration.
7. The method as in claim 1 , wherein:
said second predetermined initial amplitude is at a predetermined offset from said first predetermined initial amplitude such that during said sensing of the selected group, said second voltage on the adjacent word line provides compensation for perturbations from said adjacent group.
8. The method as in claim 7 , wherein:
said adjacent group of storage elements is programmed subsequent to those of said selected group.
9. The method as in claim 7 , wherein:
said first voltage increases monotonically with time.
10. The method as in claim 7 , wherein:
said first voltage has a predetermined constant ramp rate.
11. The method as in claim 7 , wherein the nonvolatile storage elements are part of flash memory cells.
12. The method as in claim 7 , wherein the array of nonvolatile storage elements is organized in a NAND configuration.
13. A nonvolatile memory, comprising:
an array of storage elements;
a selected word line for accessing a selected group of storage elements in parallel;
an adjacent word line for accessing an adjacent group of storage elements in parallel;
a first voltage having a first predetermined initial amplitude and a predetermined ramp rate;
sense amplifiers, in a first pass, sensing the adjacent group of storage elements in response to said first voltage being applied to the adjacent word line and determining a time marker indicating when an associated storage element begins to conduct current, thereby encoding the state of each storage element of the adjacent group in the time-domain;
a second voltage proportional to said first voltage; and
said sense amplifiers, in a second pass, sensing the selected group of storage elements on said word line while said second voltage is applied to said adjacent word line, wherein each storage element of the selected group is sensed at a time indicated by the time marker of a storage element of said adjacent group next to said each storage element.
14. The nonvolatile memory as in claim 13 , wherein:
said adjacent group of storage elements is programmed subsequent to those of said selected group.
15. The nonvolatile memory as in claim 13 , wherein:
said first voltage increases monotonically with time.
16. The nonvolatile memory as in claim 13 , wherein:
said first voltage has a predetermined constant ramp rate.
17. The nonvolatile memory as in claim 13 , wherein the nonvolatile storage elements are part of flash memory cells.
18. The nonvolatile memory as in claim 13 , wherein the array of nonvolatile storage elements is organized in a NAND configuration.
19. The nonvolatile memory as in claim 13 , wherein:
said second predetermined initial amplitude is at a predetermined offset from said first predetermined initial amplitude such that during said sensing of the selected group, said second voltage on the adjacent word line provides compensation for perturbations from said adjacent group.