Field effect transistor
A field effect transistor includes a GaN epitaxial substrate, a gate electrode formed on an electron channel layer of the substrate, and source and drain electrodes arranged spaced apart by a prescribed distance on opposite sides of the gate electrode. The source and drain electrodes are in ohmic contact with the substrate. At an upper portion of the gate electrode, a field plate is formed protruding like a visor to the side of drain electrode. Between the electron channel layer of the epitaxial substrate and the field plate, a dielectric film is formed. The dielectric film is partially removed at a region immediately below the field plate, to be flush with a terminal end surface of the field plate. The dielectric film extends from a lower end of the removed portion to the drain electrode, to be overlapped on the drain electrode.
1. A field effect transistor, comprising, on a surface layer of a semiconductor substrate, a source electrode and a drain electrode arranged spaced apart by a prescribed distance on opposite sides of a gate electrode, wherein
a field plate protruding like a visor to the side of said drain electrode is formed at an upper portion of said gate electrode;
a dielectric film is formed between said field plate and a surface layer of said semiconductor substrate to which said source electrode and said drain electrode are in ohmic contact; and
said dielectric film is partially removed at a region immediately below said field plate to be flush with a terminal end surface of said field plate and extends from a lower end of the removed portion to the drain electrode to be connected to said drain electrode, wherein the region of the partially removed portion is outside the peripheral of the field plate from the perspective perpendicular to the surface layer of the semiconductor substrate.
2. The field effect transistor according to claim 1 , wherein
the removed portion of said dielectric film has its depth set such that, when a prescribed gate voltage is applied to said gate electrode and a prescribed drain voltage is applied to said drain electrode with a voltage applied to said source electrode being ground potential, electric field strength at an upper end portion forming a boundary to the terminal end of said field plate and electric field strength at a lower end become equal to each other.
3. The field effect transistor according to claim 2 , wherein
said dielectric film has a recess formed between said drain electrode and the terminal end surface of said field plate.
4. The field effect transistor according to claim 3 , wherein
said dielectric film has a single-layered structure formed of TaOx, SiNx, SiO 2 or HfOx.
5. The field effect transistor according to claim 3 , wherein
said dielectric film has a two-layered structure; and
dielectric constant of a first dielectric film as an upper layer is higher than dielectric constant of a second dielectric film as a lower layer.
6. The field effect transistor according to claim 5 , wherein
said second dielectric film is formed interposed between said gate electrode and a surface layer of said semiconductor substrate.
7. The field effect transistor according to claim 6 , wherein
said first dielectric film is formed of TaOx, SiNx, SiO 2 or HfOx; and
said second dielectric film is formed of SiNx.
8. The field effect transistor according to claim 1 , wherein
said dielectric film has a recess formed between said drain electrode and the terminal end surface of said field plate.
9. The field effect transistor according to claim 1 , wherein
said dielectric film has a single-layered structure formed of TaOx, SiNx, SiO 2 or HfOx.
10. The field effect transistor according to claim 1 , wherein
said dielectric film has a two-layered structure; and
dielectric constant of a first dielectric film as an upper layer is higher than dielectric constant of a second dielectric film as a lower layer.