Methods of forming microelectronic packaging substrates having through-substrate vias therein

1. A method of forming a substrate for microelectronic packaging, comprising:

forming a substrate having a plurality of electrically conductive signal pads on a first surface thereof;

selectively etching through a second surface of the substrate to define a through-substrate trench that exposes underlying portions of the electrically conductive signal pads and also define through-substrate slots extending between respective pairs of the electrically conductive signal pads; then

forming a metal seed layer on the second surface of the substrate; then

selectively electroplating wraparound electrodes onto the second surface, etched sidewalls of the trench and onto the underlying portions of the electrically conductive signal pads; and

selectively removing portions of the metal seed layer from the second surface of the substrate, using the wraparound electrodes as removal masks.

2. The method of claim 1 , wherein said forming a substrate comprises forming a substrate having a metal seal ring on the first surface and a plurality of electrically conductive signal pads on portions of the first surface that are outside a perimeter of the seal ring.

3. The method of claim 1 , wherein said selectively electroplating wraparound electrodes is preceded by patterning a resist layer on the metal seed layer; and wherein said selectively electroplating wraparound electrodes comprises selectively electroplating wraparound electrodes onto the metal seed layer, using the patterned resist layer as an electroplating mask.

4. The method of claim 3 , wherein said forming a metal seed layer comprises forming a metal seed layer on the etched sidewalls of the trench.

5. The method of claim 1 , wherein said forming a metal seed layer comprises forming a metal seed layer on the etched sidewalls of the trench.

6. The method of claim 1 , wherein each of the through-substrate slots has sidewalls that extend to the etched sidewalls of the trench.

7. The method of claim 1 , wherein said selectively electroplating wraparound electrodes is preceded by patterning a resist layer having openings that extend diametrically opposite the plurality of electrically conductive signal pads.

8. The method of claim 1 , wherein said selectively etching comprises selectively etching through a second surface of the substrate to reveal underlying portions of the electrically conductive signal pads that extend outwards relative to the etched sidewalls of the trench.

9. A method of forming a substrate for microelectronic packaging, comprising:

electroplating a metal seed layer onto a sidewall of a trench extending through the substrate, said sidewall having a slot therein that extends through the substrate and is sufficiently narrow to block plating of the metal seed layer onto sidewalls of the slot; and

selectively electroplating a pair of electrodes onto side-by-side portions of the metal seed layer on the sidewall of the trench, using the slot to define a self-aligned separation between the pair of electrodes.

10. The method of claim 9 , wherein said step of selectively electroplating a pair of electrodes is preceded by a step of patterning a resist layer on the metal seed layer; and wherein said step of selectively electroplating a pair of electrodes comprises electroplating the pair of electrodes using the patterned resist layer as an electroplating mask.

11. A method of forming a substrate for microelectronic packaging, comprising:

electroplating a plurality of spaced-apart metal electrodes onto respective side-by-side portions of a sidewall of a substrate having a plurality of spaced-apart slots therein that are sufficiently narrow to thereby provide electrical isolation between the plurality of spaced-apart metal electrodes by blocking electroplating of metal onto sidewalls of the slots.