Small electrode for phase change memories
View Patent ↗A semiconductor device is disclosed. In one embodiment, the semiconductor device includes a memory cell, which in turn includes an electrode and a phase change material. The electrode may be disposed on a substrate and include a sublithographic lateral dimension parallel to the substrate. The phase change material may be coupled to the electrode and include a lateral dimension parallel to the substrate and greater than the sublithographic lateral dimension of the electrode. Various semiconductor devices and manufacturing methods are also provided.
1. A semiconductor device, comprising:
a memory cell including:
a first electrode within a pore of a dielectric layer, the dielectric layer formed over a conductive substrate and the pore extending from an upper surface of the dielectric layer to a lower surface of the dielectric layer adjacent the conductive substrate, the first electrode having an outer surface that is substantially circular and having an exposed first surface having a sublithographic dimension in a first direction parallel to the exposed first surface, the first electrode also having a second surface opposite the first surface and adjacent the conductive substrate, the second surface having a sublithographic dimension in an additional direction parallel to the second surface; and
a layer of phase change material coupled to the exposed first surface of the first electrode.
2. The semiconductor device of claim 1 , wherein the first electrode includes titanium.
3. The semiconductor device of claim 1 , wherein the phase change material includes a chalcogenide material.
4. The semiconductor device of claim 1 , further including a second electrode in contact with an upper surface of the phase change material.
5. The semiconductor device of claim 4 , wherein the second electrode and the phase change material have lithographic dimensions in a second direction parallel to the upper surface of the phase change material.
6. A semiconductor device, comprising:
a memory cell including:
a first electrode within a pore of a dielectric layer, the dielectric layer formed over a conductive substrate and the pore extending from an upper surface of the dielectric layer to a lower surface of the dielectric layer adjacent the conductive substrate, the first electrode having an outer surface that is generally rectangular and having an exposed first surface having a sublithographic dimension in a first direction parallel to the exposed first surface, the first electrode also having a second surface opposite the first surface and adjacent the conductive substrate, the second surface having a sublithographic dimension in an additional direction parallel to the second surface; and
a layer of phase change material coupled to the exposed first surface of the first electrode.
7. The semiconductor device of claim 6 , wherein the exposed first surface and the outer surface are essentially orthogonal.
8. The semiconductor device of claim 6 , wherein the phase change material includes a chalcogenide material.
9. The semiconductor device of claim 6 , further including a second electrode in contact with an upper surface of the phase change material.
10. The semiconductor device of claim 9 , wherein the second electrode and the phase change material have lithographic dimensions in a second direction parallel to the upper surface of the phase change material.
11. The semiconductor device of claim 6 , further including a diode coupled in series with the memory cell to provide read/write operations from/to the memory cell.
12. A semiconductor device, comprising:
a memory cell including:
a first electrode disposed on a substrate, the first electrode including a sublithographic lateral dimension parallel to the substrate;
a phase change material coupled to the first electrode, wherein the phase change material includes a lateral dimension parallel to the substrate and greater than the sublithographic lateral dimension of the first electrode; and
a second electrode disposed over the phase change material, wherein the second electrode includes a planar surface adjacent the phase change material and parallel to the substrate.
13. The semiconductor device of claim 12 , wherein the second electrode includes a cross-section having a lateral dimension parallel to the substrate and substantially equal to the lateral dimension of the phase change material.
14. The semiconductor device of claim 12 , wherein the phase change material comprises an alloy including tellurium, antimony, and germanium.
15. The semiconductor device of claim 14 , wherein the ratio of tellurium atoms to antimony atoms in the alloy is substantially equal to 5:2.
16. The semiconductor device of claim 14 , wherein the ratio of tellurium atoms to germanium atoms in the alloy is substantially equal to 5:2.
17. The semiconductor device of claim 12 , wherein the first electrode includes an additional dimension perpendicular to the substrate and substantially equal to 500 Angstroms.
18. The semiconductor device of claim 17 , wherein the phase change material includes an additional dimension perpendicular to the substrate and substantially equal to 1000 Angstroms.
19. The semiconductor device of claim 18 , comprising a second electrode disposed over the phase change material, the second electrode including a dimension perpendicular to the substrate and substantially equal to 600 Angstroms.
20. A semiconductor device, comprising:
a memory cell including:
a first electrode having a generally rectangular cross-section and having an exposed first surface having a sublithographic dimension in a first direction parallel to the exposed first surface, wherein the exposed first surface and the generally rectangular cross-section are essentially parallel; and
a layer of phase change material coupled to the exposed first surface of the first electrode.