IP Library Granted Patent US 8,723,304
Granted Patent B2
US 8,723,304 · App. 12/358,566 · Granted May 13, 2014

Semiconductor package and methods of fabricating the same

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Quick Facts
Patent No.
US 8,723,304
App. No.
12/358,566
Granted
May 13, 2014
Kind
B2
Abstract

Provided is a semiconductor package having a power device and methods of fabricating the same. The semiconductor package includes a lead frame, a polymer layer component on the lead frame, a metal layer component on the polymer layer component, and a semiconductor chip on the metal layer component. The polymer layer component may include a material formed by adding alumina Al 2 O 3 , an aluminum nitride (AlN), or a boron nitride BN to an epoxy resin. The polymer layer component may have high thermal conductivity and good electric insulating characteristics.

Claims (46)

1. A semiconductor package comprising:

a lead frame having a base plate, a first lead, and a second lead, wherein the first lead and the second lead are spaced apart from the base plate;

a polymer layer component disposed on the base plate of the lead frame;

a metal layer component disposed on the polymer layer component and insulated from the base plate by the polymer layer component;

a first semiconductor chip disposed on the metal layer component;

a second semiconductor chip disposed on the base plate of the lead frame;

a first elongated metallic electrical conductor having a long and narrow body extending between one end and an other end and connected at the one end in immediate physical contact with the first semiconductor chip and at the other end in immediate physical contact with the base plate;

a second elongated metallic electrical conductor having a long and narrow body extending from the one end to an other end and connected at the one end in immediate physical contact with the metal layer and at the other end in immediate physical contact with the first lead; and

a third elongated metallic electrical conductor having a long and narrow body extending from one end to an other end and connected at the one end in immediate physical contact with the second semiconductor chip and at the other end in immediate physical contact with the second lead.

2. The semiconductor package of claim 1 having no more than three leads.

3. The semiconductor package of claim 1 , further comprising a third lead integral with the lead frame.

4. The semiconductor package of claim 3 , wherein the third lead is between the first lead and the second lead.

5. The semiconductor package of claim 1 , wherein the first elongated metallic electrical conductor directly connects the first semiconductor chip to the base plate; the second elongated metallic electrical conductor directly connects the metal layer to the first lead; and the third elongated metallic electrical conductor directly connects the second semiconductor chip to the second lead.

6. The semiconductor package of claim 1 , wherein the polymer layer component comprises a polymer layer component having high thermal conductivity and good electric insulating characteristics.

7. The semiconductor package of claim 1 , wherein the metal layer component contains copper.

8. The semiconductor package of claim 1 , wherein the first semiconductor chip comprises one of a metal-oxide semiconductor field effect transistor (MOSFET), an insulated-gate bipolar transistor (IGBT), and a diode.

9. The semiconductor package of claim 1 , wherein the first elongated metallic electrical conductor comprises one of a bonding wire, a ribbon wire and a metal clip.

10. The semiconductor package of claim 1 , wherein the polymer layer component comprises a material formed by adding one compound selected from a group consisting of an aluminum nitride (AIN), and a boron nitride (BN) to an epoxy resin.

11. The semiconductor package of claim 1 , wherein the first semiconductor chip comprises an electrical terminal formed on the top or bottom of the first semiconductor chip.

12. The semiconductor package of claim 1 , wherein an upper surface of the first semiconductor chip is smaller than an upper surface of the metal layer component.

13. The semiconductor package of claim 1 , wherein the first elongated metallic electrical conductor comprises bonding wire.

14. The semiconductor package of claim 1 , wherein the first elongated metallic electrical conductor is formed of a material selected from a group consisting of gold, aluminum and copper.

15. The semiconductor package of claim 1 , further comprising a solder paste layer component between the first semiconductor chip and the metal layer component.

16. The semiconductor package of claim 1 , further comprising a sealing material sealing and protecting the polymer layer component, the metal layer component, and the semiconductor chip on the lead frame.

17. The semiconductor package of claim 1 wherein each elongated metallic electrical conductor may be any one of the group consisting of bond wires, wire ribbons and metal clips.

18. A semiconductor package comprising:

a lead frame having a base plate, a first lead, and a second lead, wherein the first lead and the second lead are spaced apart from the base plate;

a polymer layer component disposed on the base plate of the lead frame;

a metal layer component disposed on the polymer layer component and insulated from the base plate by the polymer layer component;

a first semiconductor chip disposed on the metal layer component;

a second semiconductor chip disposed on the base plate of the lead frame;

a first elongated metallic wire having a long and narrow body extending from one end to an other end and directly connected at the one end by immediate physical contact to the first semiconductor chip and directly connected at the other end by immediate physical contact to the base plate;

a second elongated metallic wire having a long and narrow body extending from one end to an other end and directly connected at the one end by immediate physical contact to the metal layer and directly connected at the other end by immediate physical contact to the first lead; and

a third elongated metallic wire having a long and narrow body extending from one end to an other end and directly connected at the one end by immediate physical contact to the second semiconductor chip and directly connected at the other end by immediate physical contact to the second lead.

19. The semiconductor package of claim 18 having no more than three leads.

20. The semiconductor package of claim 18 wherein each wire is either a bond wire or a wire ribbon.

21. A semiconductor package comprising:

a lead frame having a base plate, a first lead, and a second lead, wherein the first lead and the second lead are spaced apart from the base plate;

a polymer layer component disposed on the base plate of the lead frame;

a metal layer component disposed on the polymer layer component and insulated from the base plate by the polymer layer component;

a first semiconductor chip disposed on the metal layer component;

a second semiconductor chip disposed on the base plate of the lead frame;

a first metallic clip having a body extending from one end to an other end and directly connected at the one end by immediate physical contact to the first semiconductor chip and directly connected at the other end by immediate physical contact to the base plate;

a second elongated metallic clip having a body extending from one end to an other end and directly connected at the one end by immediate physical contact to the metal layer and directly connected at the other end by immediate physical contact to the first lead; and

a third elongated metallic clip having a body extending from one end to an other end and directly connected at the one end by immediate physical contact to the second semiconductor chip and directly connected at the other end by immediate physical contact to the second lead.

22. The semiconductor package of claim 21 having no more than three leads.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 04481, FRAME 0541 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0459 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2009
From: KANG, IN-GOO; JEON, O-SEOB; SON, JOON-SEO
To: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
Reel/Frame 022147/0807 →