Semiconductor device having wiring line and manufacturing method thereof
View Patent ↗On the lower surface of a semiconductor construct having an external connection electrode, there are formed an insulating film having a planar size greater than that of the semiconductor construct, and a metal layer and a mask metal layer having a connection pad portion in which a first opening corresponding to the external connection electrode is formed. A laser beam is applied using the mask metal layer as a mask, and a second opening is thereby formed in a part of the insulating film corresponding to the external connection electrode. Then, a connection conductor is formed to connect a wiring line to the external connection electrode via the second opening of the insulating film.
1. A semiconductor device comprising:
a semiconductor construct having a semiconductor substrate and an external connection electrode provided on the semiconductor substrate;
a wiring line having a connection pad portion in which a first opening is formed to correspond to the external connection electrode of the semiconductor construct;
an insulating film which is provided between the external connection electrode and the connection pad portion and which has a second opening communicating with the first opening and reaching the external connection electrode;
a connection conductor which electrically connects the external connection electrode to the wiring line via the first opening and the second opening; and
a mask metal layer formed between the connection conductor and the wiring line.
2. The semiconductor device according to claim 1 , wherein the mask metal layer has a planar size greater than that of the external connection electrode.
3. The semiconductor device according to claim 1 , wherein the mask metal layer is formed of a material different from that of the wiring line.
4. The semiconductor device according to claim 1 , wherein the wiring line is embedded in the lower side of the insulating film.
5. The semiconductor device according to claim 1 , wherein a protective film is formed on the semiconductor substrate, and the external connection electrode is configured as part of a wiring line formed on the protective film.
6. The semiconductor device according to claim 1 , wherein the semiconductor construct has an adhesive layer covering the upper surface of the external connection electrode.
7. The semiconductor device according to claim 1 , wherein the adhesive layer has an opening constituting part of the second opening.
8. The semiconductor device according to claim 1 , wherein a protective metal layer is located between the external connection electrode and the connection conductor and is in contact with the surface of the external connection electrode.
9. The semiconductor device according to claim 1 , wherein the semiconductor construct has an antistatic protective film covering the upper surface of the external connection electrode.
10. The semiconductor device according to claim 1 , wherein an upper insulating film is provided on the side of the semiconductor substrate of the semiconductor construct, and an upper wiring line is provided on the upper insulating film.
11. The semiconductor device according to claim 1 , wherein an insulating layer is formed between the insulating film and the upper insulating film, and a circuit board connected to the wiring line is embedded in the insulating layer.
12. The semiconductor device according to claim 1 , wherein a lower overcoat film covering the wiring line and the connection conductor is provided.
13. The semiconductor device according to claim 3 , wherein the connection conductor has a metal layer of the same material as the mask metal layer at least on the mask metal layer.
14. The semiconductor device according to claim 6 , wherein the insulating film includes a lower insulating film having a region corresponding to the adhesive layer and the semiconductor construct and a region corresponding to the periphery of the former region.
15. The semiconductor device according to claim 9 , wherein the antistatic protective film has an opening communicating with the second opening.
16. The semiconductor device according to claim 10 , wherein a vertical conducting portion is formed to penetrate the insulating film and the upper insulating film and thus connect the wiring line to the upper wiring line.
17. The semiconductor device according to claim 12 , wherein an opening exposing a part of the wiring line of the lower overcoat film is provided, in the lower overcoat film and a solder bail is provided on the part of the wiring line exposed through the opening.
18. The semiconductor device according to claim 2 , wherein the connection pad portion of the wiring line has the same planar size as the mask metal layer.
19. The semiconductor device according to claim 2 , wherein the connection pad portion of the wiring line has a planar size smaller than that of the mask metal layer.
20. The semiconductor device according to claim 19 , wherein the external connection electrode is a columnar electrode.