IP Library › Granted Patent US 8,667,445
Granted Patent B2
US 8,667,445 · App. 12/359,950 · Granted Mar 4, 2014

Power mesh management method

Inventor: Chia-Lin Chuang (Hsinchu, TW)
Assignee: Realtek Semiconductor Corp.
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Quick Facts
Patent No.
US 8,667,445
App. No.
12/359,950
Granted
Mar 4, 2014
Kind
B2
Abstract

The invention discloses a power mesh management method utilized in an integrated IC. The integrated circuit includes a macro block including at least a macro block power supplying line growing along a first direction. The management method includes: defining a plurality of first power supplying lines located in a metal layer above the macro block, wherein each of the first supplying lines grows along the first direction; defining a plurality of second power supplying lines located in another metal layer above the macro block, wherein each of the second supplying lines grows along a second direction; defining a partial power supplying line from the plurality of first power supplying lines where the partial power supplying line overlaps the macro block power supplying line; and removing the partial power supplying line from the plurality of first power supplying lines.

Claims (30)

1. A power mesh management method executed by a computer, applicable to place a power mesh in an integrated circuit having at least one macro block, where each macro block comprises at least one macro block power supplying line growing along in a first direction, the management method comprising:

defining, using the computer, a plurality of first power supplying lines located in a metal layer above the macro block, wherein each of the first supplying lines grows along in the first direction;

defining, using the computer, a plurality of second power supplying lines located in another metal layer above the macro block, wherein each of the second supplying lines grows along in a second direction;

defining, using the computer, a partial power supplying line, overlapping the macro block power supplying line, from the plurality of first power supplying lines;

removing, using the computer, the partial power supplying line from the plurality of first power supplying lines; and

defining at least one parallel shifted power supplying line growing along the first direction from positions other than the position occupied by the partial power supplying line.

2. The power mesh management method according to claim 1 , further comprising:

coupling the power mesh to an external power and the macro block power supplying line for inputting the external power to the macro block through the power mesh and the macro block power supplying line.

3. The power mesh management method according to claim 1 , wherein the macro block power supplying line comprises at least one power line and at least one ground line.

4. The power mesh management method according to claim 3 , wherein the plurality of first power supplying lines comprise a plurality of power lines and a plurality of ground lines interlacing with the plurality of power lines.

5. The power mesh management method according to claim 4 , wherein the plurality of ground lines of the plurality of first power supplying lines couple to the ground line of the macro block by way of at least one via plug, and the plurality of power lines of the plurality of first power supplying lines couple to the power line of the macro block by way of at least one via plug.

6. The power mesh management method according to claim 3 , wherein the second power supplying lines comprise a plurality of power lines and a plurality of ground lines interlacing with the plurality of power lines.

7. The power mesh management method according to claim 6 , wherein the ground lines of the second power supplying lines couple to the ground line of the macro block by way of at least one via plug, and the power lines of the second power supplying lines couple to the power line of the macro block by way of at least one via plug.

8. The power mesh management method according to claim 1 , wherein the macro block power supplying line, the plurality of first power supplying lines and the plurality of second power supplying lines are respectively located in different metal layer.

9. The power mesh management method according to claim 1 , wherein the first direction and the second direction are substantially forming 90 degree angle.

10. An integrated circuit layout structure, comprising:

at least one macro block, wherein each macro block comprises at least one macro block power supplying line growing along in a first direction;

a power mesh located in at least one metal layer above the macro block for electrically coupling to an external power and the macro block to input the external power to the macro block for providing the power needed by the macro block, wherein the power mesh comprises:

a plurality of first power supplying lines, where each of the first supplying lines grows along in the first direction;

a plurality of second power supplying lines, where each of the second supplying lines grows along in the second direction;

a plurality of via holes and via plugs located between the macro block and the power mesh for forming the electrical coupling between the macro block and the power mesh, said plurality of via holes coupling to the external power and the macro block to input the external power to the macro block;

wherein none of the first power supplying lines; and

at least one parallel shifted power supplying line growing along the first direction is placed above the macro block power supplying line to overlap the position of the macro block power supplying line.

11. The integrated circuit layout structure according to claim 10 , wherein the macro block power supplying line comprises at least one power line and at least one ground line.

12. The integrated circuit layout structure according to claim 11 , wherein the plurality of first power supplying lines comprise a plurality of power lines and a plurality of ground lines interlacing with the plurality of power lines.

13. The integrated circuit layout structure according to claim 12 , wherein the ground lines of the first power supplying lines couple to the ground line of the first power supplying line by way of at least one via plug, and the plurality of power lines in the N second power supplying lines couple to the power line of the first power supplying line by way of at least one via plug.

14. The integrated circuit layout structure according to claim 11 , wherein the plurality of second power supplying lines comprise a plurality of power lines and a plurality of ground lines interlacing with the plurality of power lines.

15. The integrated circuit layout structure according to claim 14 , wherein the ground lines of the second power supplying lines couple to the ground line of the first power supplying line by way of at least one via plug, and the power lines of the second power supplying lines couple to the power line of the first power supplying line by way of at least one via plug.

16. The integrated circuit layout structure according to claim 10 , wherein the macro block power supplying line, the plurality of first power supplying lines and the plurality of second power supplying lines are respectively located in different metal layer.

17. The integrated circuit layout structure according to claim 10 , wherein the first direction and the second direction are substantially forming 90 degree angle.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2011
From: CHUANG, CHIA-LIN
To: REALTEK SEMICONDUCTOR CORP.
Reel/Frame 026560/0866 →
Priority Claims (1)
TW 97103382 A · Jan 30, 2008 · national
Continuity (1)
Related Publication 20090193381A1 · Jul 30, 2009