IP Library Granted Patent US 8,110,900
Granted Patent B2
US 8,110,900 · App. 12/360,466 · Granted Feb 7, 2012

Manufacturing process of semiconductor device and semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,110,900
App. No.
12/360,466
Granted
Feb 7, 2012
Kind
B2
Abstract

After forming a ring-shaped trench penetrating through a semiconductor substrate from a rear surface side thereof and forming an insulating film inside the trench and on the rear surface of the semiconductor substrate, a through hole is formed in the insulating film and semiconductor substrate on an inner side of the ring-shaped trench from the rear surface side, thereby exposing a surface protection insulating film formed on a front surface of the semiconductor substrate at a bottom of the through hole. After removing the surface protection insulating film at the bottom of the through hole to form an opening to expose an element surface electrode, a contact electrode connected to the element surface electrode is formed on inner walls of the through hole and opening, and a pad electrode made of the same layer as the contact electrode is formed on the rear surface of the semiconductor substrate.

Claims (20)

1. A semiconductor device comprising:

a semiconductor substrate having a first surface and a second surface opposite to the first surface;

a semiconductor element formed on the first surface of the semiconductor substrate;

a first insulating film formed on and covering the second surface of the semiconductor substrate;

a first electrode formed on the first insulating film and connected to an external electrode;

a through hole penetrating through the semiconductor substrate from the first surface to the second surface, to the insulating layer, and exposing the first electrode;

a seed layer including a first portion formed on inner walls of the through hole and a second portion formed on the second surface of the semiconductor substrate around the through hole, wherein the first portion is directly contacted the substrate, the first insulating film, and the first electrode; and

a second electrode including a first portion formed on the second surface of the semiconductor substrate around the through hole and a second portion formed on the inner walls of the through hole, the second electrode is directly contacted the seed layer, wherein

the semiconductor device further comprises:

a ring-shaped trench formed in the semiconductor substrate around the through hole so as to have a predetermined distance from the through hole; and

a second insulating film formed inside the ring-shaped trench and between the second surface of the semiconductor substrate and the seed layer, and

a space is present inside the through hole after the second electrode is formed.

2. The semiconductor device according to claim 1 ,

wherein an inner diameter of the through hole and an inner diameter of the opening are equal to each other.

3. The semiconductor device according to claim 1 ,

wherein the second insulating film is completely filled inside the ring-shaped trench.

4. The semiconductor device according to claim 1 ,

wherein a width of the ring-shaped trench is 2 to 10 μm.

5. The semiconductor device according to claim 1 ,

wherein no insulating film is formed between the inner walls of the through hole and the seed layer.

Assignments (7)
CHANGE OF NAME Recorded Nov 19, 2025
From: TESSERA ADVANCED TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.
Reel/Frame 073635/0304 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2014
From: RENESAS ELECTRONICS CORPORATION
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 032892/0212 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2011
From: YOSHIMURA, YASUHIRO; TANAKA, NAOTAKA; KAWASHITA, MICHIHIRO; NAITO, TAKAHIRO; AKAZAWA, TAKASHI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 026426/0148 →
MERGER AND CHANGE OF NAME Recorded Sep 9, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024953/0672 →