Method and apparatus for performing RLC modeling and extraction for three-dimensional integrated circuit (3D-IC) designs

1. A method for performing an RLC extraction for a three-dimensional integrated circuit (3D-IC) die, the method comprising:

receiving a 3D-IC die description which describes the 3D-IC die, wherein the 3D-IC die comprises two or more vertically stacked 2D-IC dies which are coupled through at least one through-silicon via (TSV);

transforming the 3D-IC die description into a set of 2D-IC die descriptions, wherein the transform maintains equivalency between the set of 2D-IC die descriptions and the 3D-IC die description and wherein the set of 2D-IC die descriptions includes a modified TSV;

for each 2D-IC die description in the set of 2D-IC die descriptions, performing, by computer, an electrical property extraction using a 2D-IC extraction tool to obtain a 2D-IC RLC netlist file; and

combining the set of 2D-IC RLC netlist files for the set of 2D-IC die descriptions to form an RLC netlist file for the 3D-IC die description.

2. The method of claim 1 , wherein the 3D-IC die description comprises a through-silicon via (TSV) die, wherein the TSV die further includes:

a front-side layer stack which includes a top metal layer;

a back-side layer stack which includes at least one back-side metal layer;

a double-sided substrate which is disposed between the front-side layer stack and the back-side layer stack; and

a TSV which passes through the double-sided substrate, and which electrically couples the front-side layer stack with the back-side layer stack.

3. The method of claim 2 , wherein transforming the 3D-IC die description into a set of 2D-IC die descriptions involves transforming the TSV die into one or more 2D-IC die descriptions.

4. The method of claim 3 , wherein transforming the TSV die into one or more 2D-IC die descriptions involves:

projecting the back-side layer stack onto the top of the front-side layer stack of the TSV die to create a virtual front-side layer stack, thereby removing the back-side layer stack, thereby transforming the double-sided substrate into a single-sided substrate; and

coupling the TSV to the virtual front-side layer stack while decoupling the TSV from the single-sided substrate, thereby transforming the TSV die into a 2D-IC die description.

5. The method of claim 3 , wherein transforming the TSV die into one or more 2D-IC die descriptions further involves maintaining equivalency between the TSV die and the 2D-IC die description by creating a virtual substrate shield layer which is a conductor layer disposed between the virtual front-side layer stack and the top metal layer of the front-side layer stack, wherein the TSV passes through the virtual substrate shield layer.

6. The method of claim 5 , wherein the virtual substrate shield layer is invisible to the front-side layer stack.

7. The method of claim 1 , wherein the 3D-IC die description comprises a die stack, wherein the die stack further includes:

a first die;

a second die adjacent to the first die; and

a TSV interconnecting the first die and the second die.

8. The method of claim 7 , wherein transforming the 3D-IC die description into the set of 2D-IC die descriptions involves transforming the die stack into at least two separate dies.

9. The method of claim 8 , wherein transforming the die stack into at least two separate dies involves:

identifying a transform boundary between the first die and the second die; and

separating the first die from the second die to create a first transformed die and a second transformed die, respectively,

wherein the first transformed die includes the first die and at least one metal layer adjacent to the transform boundary in the second die;

wherein the second transformed die includes the second die and at least one metal layer adjacent to the transform boundary in the first die;

and

wherein including at least one metal layer from an adjacent die facilitates maintaining equivalency between the two transformed dies and the die stack.

10. The method of claim 9 , wherein the transform boundary can be:

an interface between a top metal layer in the first die and a top metal layer in the second die in a face-to-face configuration of the 3D-IC die description;

an interface between a back-side metal layer in the first die and a top metal layer in the second die in a face-to-back configuration of the 3D-IC die description; or

an interface between a back-side metal layer in the first die and a back-side metal layer in the second die in a back-to-back configuration of the 3D-IC die description.

11. The method of claim 9 , wherein the first die is a TSV die.

12. The method of claim 9 , wherein the method further comprises transforming each of the transformed dies into one or more 2D-IC die descriptions.

13. The method of claim 1 , wherein the equivalency between the set of 2D-IC die descriptions and the 3D-IC die description can include:

an electrical property equivalency; and

a connectivity equivalency.

14. The method of claim 1 , wherein the TSV die includes a silicon-interposer die.

15. A non-transitory computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for performing an RLC extraction for a three-dimensional integrated circuit (3D-IC) die, the method comprising:

receiving a 3D-IC die description which describes the 3D-IC die, wherein the 3D-IC die comprises two or more vertically stacked 2D-IC dies which are coupled through at least one through-silicon via (TSV);

transforming the 3D-IC die description into a set of 2D-IC die descriptions, wherein the transform maintains equivalency between the set of 2D-IC die descriptions and the 3D-IC die description and wherein the set of 2D-IC die descriptions includes a modified TSV;

for each 2D-IC die description in the set of 2D-IC die descriptions, performing an electrical property extraction using a 2D-IC extraction tool to obtain a 2D-IC RLC netlist file; and

combining the set of 2D-IC RLC netlist files for the set of 2D-IC die descriptions to form an RLC netlist file for the 3D-IC die description.

16. The non-transitory computer-readable storage medium of claim 15 , wherein the 3D-IC die description comprises a through-silicon via (TSV) die, wherein the TSV die further includes:

a front-side layer stack which includes a top metal layer;

a back-side layer stack which includes at least one back-side metal layer;

a double-sided substrate which is disposed between the front-side layer stack and the back-side layer stack; and

a TSV which passes through the double-sided substrate, and which electrically couples the front-side layer stack with the back-side layer stack.

17. The non-transitory computer-readable storage medium of claim 16 , wherein transforming the 3 D-IC die description into a set of 2D-IC die descriptions involves transforming the TSV die into one or more 2D-IC die descriptions.

18. The non-transitory computer-readable storage medium of claim 17 , wherein transforming the TSV die into one or more 2D-IC die descriptions involves:

projecting the back-side layer stack onto the top of the front-side layer stack of the TSV die to create a virtual front-side layer stack, thereby removing the back-side layer stack, thereby transforming the double-sided substrate into a single-sided substrate; and

coupling the TSV to the virtual front-side layer stack while decoupling the TSV from the single-sided substrate, thereby transforming the TSV die into a 2D-IC die description.

19. The non-transitory computer-readable storage medium of claim 17 , wherein transforming the TSV die into one or more 2D-IC die descriptions further involves maintaining equivalency between the TSV die and the 2D-IC die description by creating a virtual substrate shield layer which is a conductor layer disposed between the virtual front-side layer stack and the top metal layer of the front-side layer stack, wherein the TSV passes through the virtual substrate shield layer.

20. The non-transitory computer-readable storage medium of claim 19 , wherein the virtual substrate shield layer is invisible to the front-side layer stack.

21. The non-transitory computer-readable storage medium of claim 15 , wherein the 3D-IC die description comprises a die stack, wherein the die stack further includes:

a first die;

a second die adjacent to the first die; and

a TSV interconnecting the first die and the second die.

22. The non-transitory computer-readable storage medium of claim 21 , wherein transforming the 3D-IC die description into the set of 2D-IC die descriptions involves transforming the die stack into at least two separate dies.

23. The non-transitory computer-readable storage medium of claim 22 , wherein transforming the die stack into at least two separate dies involves:

identifying a transform boundary between the first die and the second die; and

separating the first die from the second die to create a first transformed die and a second transformed die, respectively,

wherein the first transformed die includes the first die and at least one metal layer adjacent to the transform boundary in the second die;

wherein the second transformed die includes the second die and at least one metal layer adjacent to the transform boundary in the first die;

and

wherein including at least one metal layer from an adjacent die facilitates maintaining equivalency between the two transformed dies and the die stack.

24. The non-transitory computer-readable storage medium of claim 23 , wherein the transform boundary can be:

an interface between a top metal layer in the first die and a top metal layer in the second die in a face-to-face configuration of the 3D-IC die description;

an interface between a back-side metal layer in the first die and a top metal layer in the second die in a face-to-back configuration of the 3D-IC die description; or

an interface between a back-side metal layer in the first die and a back-side metal layer in the second die in a back-to-back configuration of the 3D-IC die description.

25. The non-transitory computer-readable storage medium of claim 23 , wherein the first die is a TSV die.

26. The non-transitory computer-readable storage medium of claim 23 , wherein the method further comprises transforming each of the transformed dies into one or more 2D-IC die descriptions.

27. The non-transitory computer-readable storage medium of claim 15 , wherein the equivalency between the set of 2D-IC die descriptions and the 3D-IC die description can include:

an electrical property equivalency; and

a connectivity equivalency.

28. The non-transitory computer-readable storage medium of claim 16 , wherein the TSV die includes a silicon-interposer die.

29. An apparatus that performs an RLC extraction for a three-dimensional integrated circuit (3D-IC) die, comprising:

a processor;

a memory;

a receiving mechanism configured to receive a 3D-IC die description which describes the 3D-IC die, wherein the 3D-IC die comprises two or more vertically stacked 2D-IC dies which are coupled through at least one through-silicon via (TSV);

a transforming mechanism configured to transform the 3D-IC die description into a set of 2D-IC die descriptions, wherein the transform maintains equivalency between the set of 2D-IC die descriptions and the 3D-IC die description and wherein the set of 2D-IC die descriptions includes a modified TSV;

a 2D-IC extraction tool configured to perform an electrical property extraction for each 2D-IC die description in the set of 2D-IC die descriptions to obtain a 2D-IC RLC netlist file; and

a combining mechanism configured to combine the set of 2D-IC RLC netlist files for the set of 2D-IC die descriptions to form an RLC netlist file for the 3D-IC die description.