Semiconductor device and manufacturing method thereof
View Patent ↗A semiconductor device and a manufacturing method thereof that can prevent mutual diffusion of impurity in a silicide layer and can decrease sheet resistance of an N-type polymetal gate electrode and a P-type polymetal gate electrode, respectively in the semiconductor device having gate electrodes of a polymetal gate structure and a dual gate structure are provided. The P-type polymetal gate electrode includes a P-type silicon layer containing P-type impurity, a silicide layer formed on the P-type silicon layer and having a plurality of silicide grains which are discontinuously disposed in a direction substantially parallel with the surface of the semiconductor substrate, a silicon film continuously formed on the surface of the P-type silicon layer exposed on the discontinuous part of the silicide layer and on the surface of the silicide layer, a second metal nitride layer formed on the silicon film, and a metal layer formed on the metal nitride layer.
1. A method of manufacturing a semiconductor device, comprising:
a first step of forming an N-type silicon layer containing N-type impurity on an N-channel transistor forming region of a semiconductor substrate, and forming a P-type silicon layer containing P-type impurity on a P-channel transistor forming region of the semiconductor substrate;
a second step of forming a first silicide layer on the N-type silicon layer, and forming a second silicide layer having a plurality of silicide grains disposed discontinuously in a direction substantially parallel with the surface of the semiconductor substrate on the P-type silicon layer;
a third step of forming a continuous silicon film on the first silicide layer, on the surface of the P-type silicon layer exposed on the discontinuous part of the second silicide layer, and on the surface of the second silicide layer;
a fourth step of forming a metal nitride layer on the silicon film;
a fifth step of forming a metal layer on the metal nitride layer; and
a sixth step of patterning the metal layer, the metal nitride layer, the silicon film, the first silicide layer, the second silicide layer, the N-type silicon layer, and the P-type silicon layer, thereby forming a first gate electrode including the N-type silicon layer in the N-channel transistor forming region, and forming a second gate electrode including the P-type silicon layer in the P-channel transistor forming region, respectively.
2. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the silicon film is non-doped.
3. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein a film thickness of the silicon film formed in the third step is 0.3 nm to 1.5 nm.
4. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the silicon film is deposited under a pressure of 50 Pa to 300 Pa, by a CVD method.
5. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the deposition of the silicon film is performed for 5 seconds to 120 seconds.
6. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein before the fourth step, thermal annealing is performed to remove gas remaining in the first and the second silicide layers in the third step.
7. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein by the thermal annealing, an interface between at least the first and the second silicide layers of the silicon film is silicified.
8. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the first silicide layer, the second silicide layer, the metal nitride layer, and the metal layer contain the same refractory metal.
9. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the refractory metal is any one of tungsten (W), cobalt (Co), titanium (Ti), nickel (Ni), and tantalum (Ta).
10. The method of manufacturing a semiconductor device as claimed in claim 1 , wherein the P-type impurity is boron (B).