Copper Alloy Sputtering Target and Semiconductor Element Wiring
A first copper alloy sputtering target comprising 0.5 to 4.0 wt % of Al and 0.5 wtppm or less of Si and a second copper alloy sputtering target comprising 0.5 to 4.0 wt % of Sn and 0.5 wtppm or less of Mn are disclosed. The first and/or the second alloy sputtering target can further comprise one or more elements selected from among Sb, Zr, Ti, Cr, Ag, Au, Cd, In and As in a total amount of 1.0 wtppm or less. A semiconductor element wiring formed by the use of the above targets is also disclosed. The above copper alloy sputtering target allows the formation of a wiring material for a semiconductor element, in particular, a seed layer being stable, uniform and free from the occurrence of coagulation during electrolytic copper plating and exhibits excellent sputtering film formation characteristics.
1 . Semiconductor element wiring prepared by a process comprising the step of forming the semiconductor element wiring from a sputtering target made of a copper alloy containing 0.5 to 4.0 wt % of Al or Sn and 0.5 wtppm or less of Si or Mn and having an average crystal grain size of 0.1 to 60 μm and an average grain size variation of within ±20%.
2 . Semiconductor element wiring according to claim 1 , wherein said semiconductor element wiring is a semiconductor wiring seed layer.
3 . Semiconductor element wiring according to claim 2 , wherein said semiconductor element wiring includes a barrier film of Ta, Ta alloy, or a nitride thereof on which the seed layer is formed.
4 . Semiconductor element wiring according to claim 3 , wherein said semiconductor wiring seed layer is made of said copper alloy and contains 0.5 to 4.0 wt % of Al and an amount of Si to improve oxidation resistance.
5 . Semiconductor element wiring according to claim 3 , wherein said semiconductor wiring seed layer is made of said copper alloy and contains 0.5 to 4.0 wt % of Sn and an amount of Mn to improve oxidation resistance.
6 . Semiconductor element wiring according to claim 3 , wherein said semiconductor wiring seed layer is made of said copper alloy and contains Al and Sn, and wherein a total amount of Al and Sn contained in said copper alloy is 0.5 to 4.0 wt %.
7 . Semiconductor element wiring according to claim 3 , wherein said semiconductor wiring seed layer contains one or more elements selected from the group consisting of Sb, Zr, Ti, Cr, Ag, Au, Cd, In and As.
8 . A semiconductor element, comprising:
a substrate providing a wiring groove;
a diffusion barrier layer coating said wiring groove;
a seed layer made of copper alloy deposited via sputtering deposition on said diffusion barrier layer, said seed layer being made of a copper alloy containing 0.5 to 4.0 wt % of Al or Sn and an amount of Si or Mn to improve oxidation resistance; and
a layer of copper electrodeposited on said seed layer to provide wiring.
9 . A semiconductor element according to claim 8 , wherein said diffusion barrier layer is a film of Ta, a Ta alloy, or a nitride thereof.
10 . A semiconductor element according to claim 9 , wherein said copper alloy seed layer contains 0.5 to 4.0 wt % of Al and an amount of Si to improve oxidation resistance.
11 . A semiconductor element according to claim 9 , wherein said copper alloy seed layer contains 0.5 to 4.0 wt % of Sn and an amount of Mn to improve oxidation resistance.
12 . A semiconductor element according to claim 9 , wherein said copper alloy seed layer contains both Al and Sn, and wherein a total amount of Al and Sn contained in said copper alloy is 0.5 to 4.0 wt %.
13 . A semiconductor element according to claim 9 , wherein said copper alloy seed layer contains one or more elements selected from the group consisting of Sb, Zr, Ti, Cr, Ag, Au, Cd, In and As.
14 . A method of making semiconductor element wiring, comprising the steps of:
forming a copper alloy seed layer via sputtering deposition on a diffusion barrier layer within a wiring groove on a substrate, the sputtering deposition of the seed layer being performed with a sputtering target made of a copper alloy containing 0.5 to 4.0 wt % of Al or Sn and 0.5 wtppm or less of Si or Mn and having an average crystal grain size of 0.1 to 60 cm and an average grain size variation of within ±20%; and
electroplating copper on the seed layer to form copper wiring.
15 . A method according to claim 14 , wherein said diffusion barrier layer is a film of Ta, a Ta alloy, or a nitride thereof.
16 . A method according to claim 15 , wherein said copper alloy seed layer contains 0.5 to 4.0 wt % of Al and an amount of Si to improve oxidation resistance.
17 . A method according to claim 15 , wherein said copper alloy seed layer contains 0.5 to 4.0 wt % of Sn and an amount of Mn to improve oxidation resistance.
18 . A method according to claim 15 , wherein said copper alloy seed layer contains both Al and Sn, and wherein a total amount of Al and Sn contained in said copper alloy is 0.5 to 4.0 wt %.
19 . A method according to claim 15 , wherein said copper alloy seed layer contains one or more elements selected from the group consisting of Sb, Zr, Ti, Cr, Ag, Au, Cd, In and As.