IP Library Granted Patent US 7,880,248
Granted Patent B1
US 7,880,248 · App. 12/368,256 · Granted Feb 1, 2011

Destructor integrated circuit chip, interposer electronic device and methods

Assignee: Teledyne Technologies Incorporated
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Quick Facts
Patent No.
US 7,880,248
App. No.
12/368,256
Granted
Feb 1, 2011
Kind
B1
Abstract

A semiconductor device. The device includes a substrate and an integrated circuit chip. The device also includes an electrically or thermally reactive layer located between a top surface of the substrate and a bottom surface of the integrated circuit chip, wherein the reactive layer is positioned such that detection of tampering causes the reactive layer to be electrically or thermally energized such that the semiconductor device is at least partially destroyed.

Claims (12)

1. A semiconductor device, comprising:

a substrate;

an integrated circuit chip; and

an actuator comprising an intumescent compound, the actuator positioned between a top surface of the substrate and a bottom surface of the integrated circuit chip to at least partially destroy the integrated circuit chip upon detection of tampering.

2. The semiconductor device of claim 1 , wherein the integrated circuit chip includes a top surface having a plurality of voids.

3. The semiconductor device of claim 2 , wherein the voids are arranged in a crosshatch pattern.

4. The semiconductor device of claim 2 , wherein the voids are arranged in a non-adventitious arrangement.

5. The semiconductor device of claim 1 , further comprising a flexible interposer located between the actuator and the integrated circuit chip.

6. The semiconductor device of claim 5 , wherein the flexible interposer includes a flexible polymeric layer and one of a metallic conductive layer and a non-metallic conductive layer.

7. The semiconductor device of claim 1 , wherein the integrated circuit chip has a thickness of approximately 0.005 in. to 0.010 in.

8. The semiconductor device of claim 1 , wherein the bottom surface of the integrated circuit chip is an active surface.

9. The semiconductor device of claim 1 , wherein the integrated circuit chip is in electrical communication with the substrate using at least one of flip chip bonding and wire bonding.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2023
From: TELEDYNE TECHNOLOGIES INCORPORATED
To: TELEDYNE BROWN ENGINEERING, INC.
Reel/Frame 064245/0025 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2009
From: PHAM, CUONG V.; CHUBIN, DAVID E.; KHALIFA, COLLEEN L.
To: TELEDYNE TECHNOLOGIES INCORPORATED
Reel/Frame 022970/0929 →
Continuity (1)
Continuation In Part 1125240300 · Oct 17, 2005