IP Library Granted Patent US 9,087,603
Granted Patent B2
US 9,087,603 · App. 12/369,105 · Granted Jul 21, 2015

Method and apparatus for selective DRAM precharge

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Quick Facts
Patent No.
US 9,087,603
App. No.
12/369,105
Granted
Jul 21, 2015
Kind
B2
Abstract

Apparatus and method for using a precharge command in which a plurality of address lines are individually used to specify which banks of memory cells within a memory device have an open row that is to be closed.

Claims (8)

1. An apparatus comprising:

a memory device having a plurality of banks, each bank comprised of:

a plurality of memory cells organized into an array of rows and columns, wherein the memory device is capable of closing one or more open rows in one or more of the plurality of banks as individually specified in a precharge command, wherein the one or more open rows are closed to accommodate upcoming access commands; and

control logic coupled to the plurality of banks to control accesses made to each bank in response to commands received from an external device, wherein the commands include the precharge command in which address lines are individually used to specify the one or more of the plurality of banks having the one or more open rows that are to be closed.

2. The apparatus of claim 1 , wherein the memory bus comprises a subset of a plurality of signal lines used to individually specify the one or more of the plurality of banks that are affected by the precharge command, wherein the subset includes the address lines having row address lines to transmit a portion of a row address and not to transmit a portion of a column address as a result of a use of asymmetric addressing.

3. The apparatus of claim 2 , wherein the row address lines are enabled via programming a register within the control logic.

4. The apparatus of claim 2 , wherein the address lines further having bank address lines otherwise used to transmit a portion of a bank address in support of an alternate precharge command, and wherein the register programming is further to enable the row address lines to individually specify the one or more of the plurality of banks that are affected by the precharge command also results in disabling the bank address lines to support the alternate precharge command and in enabling the bank address lines to individually specify the one or more of the plurality of banks that are affected by the precharge command.

5. The apparatus of claim 2 , wherein the precharge command is received by the control logic as part of an autoprecharge command embedded within an access command received by the control logic.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →