IP Library Granted Patent US 7,944,249
Granted Patent B2
US 7,944,249 · App. 12/372,762 · Granted May 17, 2011

Photoreceiving circuit

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Quick Facts
Patent No.
US 7,944,249
App. No.
12/372,762
Granted
May 17, 2011
Kind
B2
Abstract

A buffer circuit includes a first transistor (T 1 ) having a base connected to a first power supply, the emitter (E 1 ) and collector (C 1 ) connected as input and output nodes, a second transistor (T 2 ) having a base connected to the first power supply, a first constant current circuit using a difference between outgoing current from E 1 and an input current at the current signal input node as a constant current, and determining outgoing current from the emitter of T 2 equal to the constant current; and a first mirror circuit equalizing first and second collector currents with a third transistor (T 3 ) with C 1 and a fourth transistor (T 4 ) with a collector connected to a collector of T 2 , a first operating point voltage is provided to the current signal output node between T 3 and T 1 , and a second operating point voltage based on the first operating point voltage between T 4 and T 2.

Claims (50)

1. A photoreceiving circuit comprising:

a buffer circuit that comprises:

a first transistor having a base connected to a first power supply, an emitter as a current signal input node, and a collector as a current signal output node;

a second transistor having a base connected to the first power supply;

a first constant current circuit using a difference between outgoing current from the emitter of the first transistor and an input current at the current signal input node as a constant current, and determining outgoing current from the emitter of the second transistor as a current same as the constant current; and

a first mirror circuit that makes a collector current of the first transistor equal to a collector current of the second transistor, the first mirror circuit having a third transistor with a collector connected to the collector of the first transistor and a fourth transistor with a collector connected to a collector of the second transistor, the buffer circuit being configured such that a first operating point voltage is provided to the current signal output node between the third transistor and the first transistor and a second operating point voltage based on the first operating point voltage is provided to a node between the fourth transistor and the second transistor;

a photoreceiving device connected to the current signal input node; and

a current-voltage conversion circuit connected to the current signal output node.

2. The photoreceiving circuit according to claim 1 , wherein the first mirror circuit includes a fifth transistor as a reference.

3. The photoreceiving circuit according to claim 2 , further comprising a sixth transistor to provide the second operating point voltage for a node between the fourth transistor and the second transistor.

4. The photoreceiving circuit according to claim 3 , further comprising a seventh transistor having an emitter connected to a base of the sixth transistor,

wherein a voltage provided to the node between the fourth transistor and the second transistor and a voltage provided to the current signal output node are determined as approximately equal.

5. The photoreceiving circuit according to claim 1 , further comprising a second mirror circuit to flow therethrough a differential current between the currents in the first constant current circuit and the first mirror circuit.

6. The photoreceiving circuit according to claim 5 , further comprising a sixth transistor to provide the second operating point voltage for a node between the fourth transistor and the second transistor.

7. The photoreceiving circuit according to claim 6 , further comprising a seventh transistor having an emitter connected to a base of the sixth transistor,

wherein a voltage provided to the node between the fourth transistor and the second transistor and a voltage provided to the current signal output node are determined as approximately equal.

8. The photoreceiving circuit according to claim 1 , further comprising a sixth transistor to provide the second operating point voltage for a node between the fourth transistor and the second transistor.

9. The photoreceiving circuit according to claim 8 , further comprising a seventh transistor having an emitter connected to a base of the sixth transistor,

wherein a voltage provided to the node between the fourth transistor and the second transistor and a voltage provided to the current signal output node are determined as approximately equal.

10. A photoreceiving circuit comprising:

a photoreceiving device connected to the current signal input node;

a current-voltage conversion circuit connected to the current signal output node; and

a first buffer circuit provided on an input side of the current-voltage conversion circuit, and a second buffer circuit provided on a reference side,

wherein each of the first buffer circuit and the second buffer circuit comprises:

a first transistor having a base connected to a first power supply, an emitter as a current signal input node, and a collector as a current signal output node;

a second transistor having a base connected to the first power supply;

a first constant current circuit using a difference between outgoing current from the emitter of the first transistor and an input current at the current signal input node as a constant current, and determining outgoing current from the emitter of the second transistor as a current same as the constant current; and

a first mirror circuit that makes a collector current of the first transistor equal to a collector current of the second transistor, the first mirror circuit has a third transistor with a collector connected to the collector of the first transistor and a fourth transistor with a collector connected to a collector of the second transistor,

a first operating point voltage is provided to the current signal output node between the third transistor and the first transistor, and

a second operating point voltage based on the first operating point voltage is provided to a node between the fourth transistor and the second transistor.

11. The photoreceiving circuit according to claim 10 , wherein the first mirror circuit includes a fifth transistor as a reference.

12. The photoreceiving circuit according to claim 11 , further comprising a sixth transistor to provide the second operating point voltage for a node between the fourth transistor and the second transistor.

13. The photoreceiving circuit according to claim 12 , further comprising a seventh transistor having an emitter connected to a base of the sixth transistor,

wherein a voltage provided to the node between the fourth transistor and the second transistor and a voltage provided to the current signal output node are determined as approximately equal.

14. The photoreceiving circuit according to claim 10 , further comprising a second mirror circuit to flow therethrough a differential current between the currents in the first constant current circuit and the first mirror circuit.

15. The photoreceiving circuit according to claim 14 , further comprising a sixth transistor to provide the second operating point voltage for a node between the fourth transistor and the second transistor.

16. The photoreceiving circuit according to claim 15 , further comprising a seventh transistor having an emitter connected to a base of the sixth transistor,

wherein a voltage provided to the node between the fourth transistor and the second transistor and a voltage provided to the current signal output node are determined as approximately equal.

17. The photoreceiving circuit according to claim 10 , further comprising a sixth transistor to provide the second operating point voltage for a node between the fourth transistor and the second transistor.

18. The photoreceiving circuit according to claim 17 , further comprising a seventh transistor having an emitter connected to a base of the sixth transistor,

wherein a voltage provided to the node between the fourth transistor and the second transistor and a voltage provided to the current signal output node are determined as approximately equal.

19. A photoreceiving circuit comprising:

a first transistor having a base connected to a first power supply and provided between a photoreceiving device and a current-voltage conversion circuit;

a second transistor having a base connected to the first power supply;

a first constant current circuit using a difference between outgoing current from the emitter of the first transistor and an input current at the current signal input node as a constant current, and determining outgoing current from the emitter of the second transistor as a current same as the constant current;

a first mirror circuit that makes a collector current of the first transistor equal to a collector current of the second transistor; and

a second constant current circuit functioning as a reference current of the first mirror circuit,

wherein the first mirror circuit has a third transistor with a collector connected to the collector of the first transistor and a fourth transistor with a collector connected to a collector of the second transistor,

a first operating point voltage is provided to the current signal output node between the third transistor and the first transistor, and

a second operating point voltage based on the first operating point voltage is provided to a node between the fourth transistor and the second transistor.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2009
From: YANAGI, HIDENOBU; IMAI, HITOSHI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022271/0215 →