Real time clock monitoring method and system
View Patent ↗Method for monitoring a real time clock and a device having real time clock monitoring capabilities, the device includes: (i) a real time clock tree, (ii) a clock frequency monitor that is adapted to determine a frequency of a real time clock signal, during a short monitoring period; (iii) a monitoring enable module, adapted to activate the clock frequency monitor during short motoring periods and to deactivate the clock frequency monitor during other periods, wherein the monitoring enable module is adapted to determine a timing of the short monitoring periods in a non-deterministic manner; and (iv) a real time clock violation indication generator adapted to indicate that a real time clock violation occurred, in response to an error signal provided from the clock frequency monitor.
1. A device having real time clock monitoring capabilities, the device comprises:
a real time clock tree that is coupled to a clock frequency monitor that is adapted to determine a frequency of a real time clock signal, during a short monitoring period;
a monitoring enable module, coupled to the real time clock tree and to the clock frequency monitor, adapted to activate the clock frequency monitor during short monitoring periods and to deactivate the clock frequency monitor during other periods, wherein the monitoring enable module is adapted to determine a timing of the short monitoring periods in a non-deterministic manner; and
a real time clock violation indication generator, coupled to the clock frequency monitor, adapted to indicate that a real time clock violation occurred, in response to an error signal provided from the clock frequency monitor.
2. The device according to claim 1 wherein the monitoring enable module comprises a non-deterministic number storage unit adapted to store a non-deterministic number.
3. The device according to claim 2 wherein the monitoring enable module comprises a non-deterministic number generator and wherein the device comprises a power manager adapted to selectively provide power to the non-deterministic number generator.
4. The device according to claim 2 wherein the monitoring enable module is adapted to determine an idle period between two consecutive monitoring periods in response to a first random number and in response to a dynamically changing number.
5. The device according to claim 2 wherein the clock frequency monitor is adapted to accurately determine the frequency of the real time clock signal in a single real time clock cycle.
6. The device according to claim 1 wherein the monitoring enable module comprises a non-deterministic number generator and wherein the device comprises a power manager adapted to selectively provide power to the non-deterministic random generator.
7. The device according to claim 6 wherein the power manager is adapted to disable the non-deterministic random generator during periods other than a powering on period of the device.
8. The device according to claim 1 wherein the monitoring enable module is adapted to determine an idle period between two consecutive monitoring periods in response to a first random number and in response to a dynamically changing number.
9. The device according to claim 1 wherein the clock frequency monitor is adapted to accurately determine the frequency of the real time clock signal in a single real time clock cycle.
10. The device according to claim 1 further comprising a stop clock monitor adapted to determine that a real time clock signal was not supplied during a long period; wherein the stop clock monitor is characterized by low power consumption; and wherein the real time clock violation indication generator is further adapted to indicate that a real time clock violation occurred in response to a stop clock indicator provided from the stop clock monitor.
11. The device according to claim 10 wherein the stop clock monitor comprises a capacitor adapted to be charged by the real time clock signal and to be discharged by a leakage current.
12. The device according to claim 10 wherein the real time clock violation indication generator comprises a logical gate adapted to generate a real time clock violation indication if either the real time clock violation indication generator received an error signal from the clock frequency monitor or a real time clock stop indication from the stop clock monitor.
13. A method for monitoring a real time clock signal, the method comprises:
measuring, during a short monitoring period and by a clock frequency monitor, a frequency of the real time clock signal;
determining in a non-deterministic manner, a timing of a next short monitoring period;
indicating that a real time clock violation occurred if the frequency of the real time clock signal is outside a predefined frequency window;
deactivating the clock frequency monitor until a beginning of the next short monitoring period and jumping to the stage of measuring the frequency of the real time clock signal.
14. The method according to claim 13 wherein the measuring comprises accurately measuring the frequency of the real time clock signal in a single real time clock cycle.
15. The method according to claim 14 further comprising determining, by a low power consuming clock stop monitor, that a real time clock signal was not supplied during a long period; and wherein the indicating that a real time clock violation occurred comprises indicating that a real time clock error occurred if the real time clock signal was not supplied during the long period.
16. The method according to claim 13 further comprising determining, by a low power consuming clock stop monitor, that a real time clock signal was not supplied during a long period; and wherein the indicating that a real time clock violation occurred comprises indicating that a real time clock error occurred if the real time clock signal was not supplied during the long period.
17. The method according to claim 16 wherein determining that the real time clock signal was provided during the long period comprises monitoring a status of a capacitor within the clock stop monitor; wherein the capacitor is being charged by the real time clock and is being discharged by a leakage current.
18. The method according to claim 16 wherein the determining in a non-deterministic manner, a timing of a next short monitoring period comprises determining a timing of a next short monitoring period during at least a first period and disabling at least one non-deterministic number generator involved in the determining during at least a second period.
19. The method according to claim 13 wherein the determining comprises determining a timing of a next short monitoring period during at least a first period and disabling at least one non-deterministic number generator involved in the determining during at least a second period.
20. The method according to claim 19 wherein the first period is a powering up period.